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Re: [Qemu-devel] [PATCH 5/5] target/s390x: mark CSST, CSST2, FPSEH facil
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH 5/5] target/s390x: mark CSST, CSST2, FPSEH facilities as available |
Date: |
Thu, 15 Jun 2017 22:49:08 +0200 |
User-agent: |
NeoMutt/20170113 (1.7.2) |
On 2017-06-14 22:53, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target/s390x/cpu_models.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
> index c3a4ce6..703feca 100644
> --- a/target/s390x/cpu_models.c
> +++ b/target/s390x/cpu_models.c
> @@ -683,8 +683,11 @@ static void add_qemu_cpu_model_features(S390FeatBitmap
> fbm)
> S390_FEAT_ETF2_ENH,
> S390_FEAT_STORE_CLOCK_FAST,
> S390_FEAT_MOVE_WITH_OPTIONAL_SPEC,
> + S390_FEAT_COMPARE_AND_SWAP_AND_STORE,
> + S390_FEAT_COMPARE_AND_SWAP_AND_STORE_2,
> S390_FEAT_GENERAL_INSTRUCTIONS_EXT,
> S390_FEAT_EXECUTE_EXT,
> + S390_FEAT_FLOATING_POINT_SUPPPORT_ENH,
Theoretically the floating-point-support-enhancement facilities include
the DFP rounding facility. Given We don't implement the DFP facility I
guess this can be ignored.
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
address@hidden http://www.aurel32.net
- Re: [Qemu-devel] [PATCH 2/5] target/s390x: Enforce instruction features, (continued)
[Qemu-devel] [PATCH 1/5] target/s390x: Map existing FAC_* names to S390_FEAT_* names, Richard Henderson, 2017/06/15
[Qemu-devel] [PATCH 3/5] target/s390x: change PSW_SHIFT_KEY, Richard Henderson, 2017/06/15
[Qemu-devel] [PATCH 5/5] target/s390x: mark CSST, CSST2, FPSEH facilities as available, Richard Henderson, 2017/06/15
[Qemu-devel] [PATCH 4/5] target/s390x: implement mvcos instruction, Richard Henderson, 2017/06/15
Re: [Qemu-devel] [PATCH 0/5] More s390x improvements, no-reply, 2017/06/15
Re: [Qemu-devel] [PATCH 0/5] More s390x improvements, no-reply, 2017/06/15