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[Qemu-devel] [PATCH v9 11/26] target: [tcg, i386] Refactor disas_insn
From: |
Lluís Vilanova |
Subject: |
[Qemu-devel] [PATCH v9 11/26] target: [tcg, i386] Refactor disas_insn |
Date: |
Sun, 25 Jun 2017 12:28:08 +0300 |
User-agent: |
StGit/0.17.1-dirty |
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova <address@hidden>
---
target/i386/translate.c | 72 +++++++++++++++++++++++++++++++----------------
1 file changed, 47 insertions(+), 25 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 04d65b8416..34e7cf6788 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -4436,16 +4436,17 @@ static void gen_sse(CPUX86State *env, DisasContext *s,
int b,
/* convert one instruction. s->base.is_jmp is set if the translation must
be stopped. Return the next pc value */
-static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
- target_ulong pc_start)
+static target_ulong disas_insn(DisasContextBase *db, CPUState *cpu)
{
- DisasContextBase *db = &s->base;
+ DisasContext *s = container_of(db, DisasContext, base);
+ CPUX86State *env = cpu->env_ptr;
int b, prefixes;
int shift;
TCGMemOp ot, aflag, dflag;
int modrm, reg, rm, mod, op, opreg, val;
target_ulong next_eip, tval;
int rex_w, rex_r;
+ target_ulong pc_start = db->pc_next;
s->pc_start = s->pc = pc_start;
prefixes = 0;
@@ -8494,10 +8495,50 @@ static BreakpointCheckType
i386_trblock_breakpoint_check(
}
}
+static target_ulong i386_trblock_disas_insn(DisasContextBase *db, CPUState
*cpu)
+{
+ DisasContext *dc = container_of(db, DisasContext, base);
+ target_ulong pc_next = disas_insn(db, cpu);
+
+ if (db->is_jmp) {
+ return pc_next;
+ }
+
+ if (dc->tf || (db->tb->flags & HF_INHIBIT_IRQ_MASK)) {
+ /* if single step mode, we generate only one instruction and
+ generate an exception */
+ /* if irq were inhibited with HF_INHIBIT_IRQ_MASK, we clear
+ the flag and abort the translation to give the irqs a
+ change to be happen */
+ gen_jmp_im(pc_next - dc->cs_base);
+ gen_eob(dc);
+ db->is_jmp = DJ_TOO_MANY;
+ } else if ((db->tb->cflags & CF_USE_ICOUNT)
+ && ((db->pc_next & TARGET_PAGE_MASK)
+ != ((db->pc_next + TARGET_MAX_INSN_SIZE - 1)
+ & TARGET_PAGE_MASK)
+ || (db->pc_next & ~TARGET_PAGE_MASK) == 0)) {
+ /* Do not cross the boundary of the pages in icount mode,
+ it can cause an exception. Do it only when boundary is
+ crossed by the first instruction in the block.
+ If current instruction already crossed the bound - it's ok,
+ because an exception hasn't stopped this code.
+ */
+ gen_jmp_im(pc_next - dc->cs_base);
+ gen_eob(dc);
+ db->is_jmp = DJ_TOO_MANY;
+ } else if ((pc_next - db->pc_first) >= (TARGET_PAGE_SIZE - 32)) {
+ gen_jmp_im(pc_next - dc->cs_base);
+ gen_eob(dc);
+ db->is_jmp = DJ_TOO_MANY;
+ }
+
+ return pc_next;
+}
+
/* generate intermediate code for basic block 'tb'. */
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb)
{
- CPUX86State *env = cpu->env_ptr;
DisasContext dc1, *dc = &dc1;
DisasContextBase *db = &dc1.base;
CPUBreakpoint *bp;
@@ -8547,39 +8588,20 @@ void gen_intermediate_code(CPUState *cpu,
TranslationBlock *tb)
gen_io_start(cpu_env);
}
- db->pc_next = disas_insn(env, dc, db->pc_next);
+ db->pc_next = i386_trblock_disas_insn(db, cpu);
/* stop translation if indicated */
if (db->is_jmp) {
break;
}
/* if single step mode, we generate only one instruction and
generate an exception */
- /* if irq were inhibited with HF_INHIBIT_IRQ_MASK, we clear
- the flag and abort the translation to give the irqs a
- change to be happen */
- if (dc->tf || db->singlestep_enabled ||
- (db->tb->flags & HF_INHIBIT_IRQ_MASK)) {
- gen_jmp_im(db->pc_next - dc->cs_base);
- gen_eob(dc);
- break;
- }
- /* Do not cross the boundary of the pages in icount mode,
- it can cause an exception. Do it only when boundary is
- crossed by the first instruction in the block.
- If current instruction already crossed the bound - it's ok,
- because an exception hasn't stopped this code.
- */
- if ((tb->cflags & CF_USE_ICOUNT)
- && ((db->pc_next & TARGET_PAGE_MASK)
- != ((db->pc_next + TARGET_MAX_INSN_SIZE - 1) &
TARGET_PAGE_MASK)
- || (db->pc_next & ~TARGET_PAGE_MASK) == 0)) {
+ if (db->singlestep_enabled) {
gen_jmp_im(db->pc_next - dc->cs_base);
gen_eob(dc);
break;
}
/* if too long translation, stop generation too */
if (tcg_op_buf_full() ||
- (db->pc_next - db->pc_first) >= (TARGET_PAGE_SIZE - 32) ||
num_insns >= max_insns) {
gen_jmp_im(db->pc_next - dc->cs_base);
gen_eob(dc);
- Re: [Qemu-devel] [PATCH v9 04/26] target: [tcg] Add generic translation framework, (continued)
- [Qemu-devel] [PATCH v9 05/26] target: [tcg] Redefine DISAS_* onto the generic translation framework (DJ_*), Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 06/26] target: [tcg, i386] Port to DisasContextBase, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 07/26] target: [tcg, i386] Refactor init_disas_context, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 08/26] target: [tcg, i386] Refactor init_globals, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 09/26] target: [tcg, i386] Refactor insn_start, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 10/26] target: [tcg, i386] Refactor breakpoint_check, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 11/26] target: [tcg, i386] Refactor disas_insn,
Lluís Vilanova <=
- [Qemu-devel] [PATCH v9 12/26] target: [tcg,i386] Refactor tb_stop, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 13/26] target: [tcg, i386] Refactor disas_flags, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 14/26] target: [tcg, i386] Replace DISAS_* with DJ_*, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 16/26] target: [tcg, arm] Replace DISAS_* with DJ_*, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 17/26] target: [tcg, arm] Port to DisasContextBase, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 18/26] target: [tcg, arm] Port to init_disas_context, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 19/26] target: [tcg, arm] Port to init_globals, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 20/26] target: [tcg,arm] Port to tb_start, Lluís Vilanova, 2017/06/25
- [Qemu-devel] [PATCH v9 21/26] target: [tcg, arm] Port to insn_start, Lluís Vilanova, 2017/06/25