[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [RFC PATCH 21/26] ppc/xive: introduce routines to allocate
From: |
Cédric Le Goater |
Subject: |
[Qemu-devel] [RFC PATCH 21/26] ppc/xive: introduce routines to allocate IRQ numbers |
Date: |
Wed, 5 Jul 2017 19:13:34 +0200 |
The IRQ number allocator is inspired by OPAL which allocates IPI IRQ
numbers from the bottom of the IRQ number space and allocates the HW
IRQ numbers from the top.
So, this might be slightly overkill for our need. Needs to be
discussed.
Signed-off-by: Cédric Le Goater <address@hidden>
---
hw/intc/xive.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++
include/hw/ppc/xive.h | 1 +
2 files changed, 54 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index bec123649ebd..42eefbe7fd65 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -748,6 +748,59 @@ void xive_ics_create(XiveICSState *xs, XIVE *x, uint32_t
offset,
}
/*
+ * IRQ number allocators
+ */
+uint32_t xive_alloc_hw_irqs(XIVE *x, uint32_t count, uint32_t align)
+{
+ uint32_t base;
+ int i;
+
+ base = x->int_hw_bot - count;
+ base &= ~(align - 1);
+ if (base < x->int_ipi_top) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "XIVE: HW alloc request for %d interrupts "
+ "aligned to %d failed\n",
+ count, align);
+ return -1;
+ }
+
+ x->int_hw_bot = base;
+
+ for (i = 0; i < count; i++) {
+ XiveIVE *ive = xive_get_ive(x, base + i);
+
+ ive->w = IVE_VALID | IVE_MASKED;
+ }
+ return base;
+}
+
+static uint32_t xive_alloc_ipi_irqs(XIVE *x, uint32_t count, uint32_t align)
+{
+ uint32_t base;
+ int i;
+
+ base = x->int_ipi_top + (align - 1);
+ base &= ~(align - 1);
+ if (base >= x->int_hw_bot) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "IPI alloc request for %d interrupts aligned to %d "
+ "failed\n",
+ count, align);
+ return -1;
+ }
+
+ x->int_ipi_top = base + count;
+
+ for (i = 0; i < count; i++) {
+ XiveIVE *ive = xive_get_ive(x, base + i);
+
+ ive->w = IVE_VALID | IVE_MASKED;
+ }
+ return base;
+}
+
+/*
* Main XIVE object
*/
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index a1c7797658ba..3c1cd96ea4d0 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -69,6 +69,7 @@ void xive_spapr_init(sPAPRMachineState *spapr);
void xive_spapr_populate(XIVE *x, void *fdt);
void xive_mmio_map(XIVE *x);
+uint32_t xive_alloc_hw_irqs(XIVE *x, uint32_t count, uint32_t align);
void xive_ics_create(XiveICSState *xs, XIVE *x, uint32_t offset,
uint32_t nr_irqs, uint32_t shift, uint32_t flags,
--
2.7.5
- [Qemu-devel] [RFC PATCH 17/26] ppc/xive: add hcalls support, (continued)
- [Qemu-devel] [RFC PATCH 17/26] ppc/xive: add hcalls support, Cédric Le Goater, 2017/07/05
- [Qemu-devel] [RFC PATCH 18/26] ppc/xive: add device tree support, Cédric Le Goater, 2017/07/05
- [Qemu-devel] [RFC PATCH 19/26] ppc/xive: introduce a helper to map the XIVE memory regions, Cédric Le Goater, 2017/07/05
- [Qemu-devel] [RFC PATCH 20/26] ppc/xive: introduce a helper to create XIVE interrupt source objects, Cédric Le Goater, 2017/07/05
- [Qemu-devel] [RFC PATCH 21/26] ppc/xive: introduce routines to allocate IRQ numbers,
Cédric Le Goater <=
- [Qemu-devel] [RFC PATCH 22/26] ppc/xive: create an XIVE interrupt source to handle IPIs, Cédric Le Goater, 2017/07/05
- [Qemu-devel] [RFC PATCH 23/26] spapr: add a XIVE object to the sPAPR machine, Cédric Le Goater, 2017/07/05
- [Qemu-devel] [RFC PATCH 24/26] spapr: include the XIVE interrupt source for IPIs, Cédric Le Goater, 2017/07/05
- [Qemu-devel] [RFC PATCH 25/26] spapr: print the XIVE interrupt source for IPIs in the monitor, Cédric Le Goater, 2017/07/05
- [Qemu-devel] [RFC PATCH 26/26] spapr: force XIVE exploitation mode for POWER9 (HACK), Cédric Le Goater, 2017/07/05
- Re: [Qemu-devel] [RFC PATCH 00/26] guest exploitation of the XIVE interrupt controller (POWER9), David Gibson, 2017/07/10
- Re: [Qemu-devel] [RFC PATCH 00/26] guest exploitation of the XIVE interrupt controller (POWER9), David Gibson, 2017/07/18