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Re: [Qemu-devel] [PATCH 2/7] hw/char/cmsdk-apb-uart.c: Implement CMSDK A
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 2/7] hw/char/cmsdk-apb-uart.c: Implement CMSDK APB UART |
Date: |
Tue, 11 Jul 2017 21:51:36 +0100 |
On 11 July 2017 at 21:42, Philippe Mathieu-Daudé <address@hidden> wrote:
> Hi Peter,
>
> There is probably no need yet, but we could model a generic APB slave with
> this code, as an overlapping subregion (device top 0x30 bytes).
>
> For now only PID0 differs, but since all ID are 8bit the device could even
> instantiate the subregion with some u64 PID, 32 CID args.
>
> (thinking about watchdog and dualtimers).
If you look at the pl* primecell devices you'll see that's not
historically how we've done them. I think it would be more
code in each device to instantiate a generic device to
handle the ID register section and a container to put it
in than just to deal with the IDs by hand...
thanks
-- PMM
- Re: [Qemu-devel] [PATCH 1/7] hw/arm/mps2: Implement skeleton mps2-an385 and mps2-an511 board models, (continued)
- [Qemu-devel] [PATCH 4/7] hw/char/cmsdk-apb-timer: Implement CMSDK APB timer device, Peter Maydell, 2017/07/11
- [Qemu-devel] [PATCH 2/7] hw/char/cmsdk-apb-uart.c: Implement CMSDK APB UART, Peter Maydell, 2017/07/11
- Re: [Qemu-devel] [PATCH 0/7] ARM: implement MPS2 board (with 2 FPGA flavours), Philippe Mathieu-Daudé, 2017/07/11
- Re: [Qemu-devel] [PATCH 0/7] ARM: implement MPS2 board (with 2 FPGA flavours), no-reply, 2017/07/11
- Re: [Qemu-devel] [PATCH 0/7] ARM: implement MPS2 board (with 2 FPGA flavours), no-reply, 2017/07/11