Re: [Qemu-devel] [RFC PATCH for 2.11 12/23] target/arm/translate-a64.c: add FP16 FAGCT to AdvSIMD 3 Same

[Peter Maydell]

On 21 July 2017 at 14:50, Alex Bennée <address@hidden> wrote:
> Aurelien Jarno <address@hidden> writes:
>> As said in another email, some architectures actually use more than one
>> float_status. We therefore need to implement a solution like the one
>> proposed by Richard.
>
> Ahh you mean more than one float_status for a given vCPU context?

Yep. ARM's cpu state struct has
        float_status fp_status;
        float_status standard_fp_status;

which we use to handle (1) operations which use the state
controlled by the FPSCR value and (2) operations which
ignore the FPSCR and use the "Standard FPSCR Value" (generally
Neon ops). More info in the comment in cpu.h...

thanks
-- PMM