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Re: [Qemu-devel] [PATCH] tcg/softmmu: Increase size of TLB caches
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-devel] [PATCH] tcg/softmmu: Increase size of TLB caches |
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Date: |
Tue, 29 Aug 2017 10:40:39 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 |
On 08/29/2017 10:23 AM, Pranith Kumar wrote:
> This patch increases the number of entries cached in the TLB. I went
> over a few architectures to see if increasing it is problematic. Only
> armv6 seems to have a limitation that only 8 bits can be used for
> indexing these entries. For other architectures, the number of TLB
> entries is increased to a 4K-sized cache. The patch also doubles the
> number of victim TLB entries.
>
> Some statistics collected from a build benchmark for various cache
> sizes is listed below:
>
> | TLB bits\vTLB entires | 8 | 16 | 32 |
> | 8 | 952.94(+0.0%) | 929.99(+2.4%) | 919.02(+3.6%) |
> | 10 | 898.92(+5.6%) | 886.13(+7.0%) | 887.03(+6.9%) |
> | 12 | 878.56(+7.8%) | 873.53(+8.3%)* | 875.34(+8.1%) |
>
> The best combination for this workload came out to be 12 bits for the
> TLB and a 16 entry vTLB cache.
>
> Signed-off-by: Pranith Kumar <address@hidden>
> ---
> include/exec/cpu-defs.h | 6 +++---
> tcg/aarch64/tcg-target.h | 1 +
> tcg/arm/tcg-target.h | 1 +
> tcg/i386/tcg-target.h | 2 ++
> tcg/ia64/tcg-target.h | 1 +
> tcg/mips/tcg-target.h | 2 ++
> tcg/ppc/tcg-target.h | 1 +
> tcg/s390/tcg-target.h | 1 +
> tcg/sparc/tcg-target.h | 1 +
> tcg/tci/tcg-target.h | 1 +
> 10 files changed, 14 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~