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[Qemu-devel] [Qemu devel v8 PATCH 0/5] Add support for Smartfusion2 SoC
From: |
Subbaraya Sundeep |
Subject: |
[Qemu-devel] [Qemu devel v8 PATCH 0/5] Add support for Smartfusion2 SoC |
Date: |
Fri, 8 Sep 2017 00:54:06 +0530 |
Hi Qemu-devel,
I am trying to add Smartfusion2 SoC.
SoC is from Microsemi and System on Module(SOM)
board is from Emcraft systems. Smartfusion2 has hardened
Microcontroller(Cortex-M3)based Sub System and FPGA fabric.
At the moment only system timer, sysreg and SPI
controller are modelled.
Testing:
./arm-softmmu/qemu-system-arm -M smartfusion2-som -serial mon:stdio \
-kernel u-boot.bin -display none -drive file=spi.bin,if=mtd,format=raw
Binaries u-boot.bin and spi.bin are at:
https://github.com/Subbaraya-Sundeep/qemu-test-binaries.git
U-boot is from Emcraft with modified
- SPI driver not to use PDMA.
- ugly hack to pass dtb to kernel in r1.
@
https://github.com/Subbaraya-Sundeep/emcraft-uboot-sf2.git
Linux is 4.5 linux with Smartfusion2 SoC dts and clocksource
driver added by myself @
https://github.com/Subbaraya-Sundeep/linux.git
v8:
memory_region_init_ram to memory_region_init_rom in soc
%s/emcraft_sf2_init/emcraft_sf2_s2s010_init/g in som
Added mc->ignore_memory_transaction_failures = true in som
as per latest commit.
Code simplifications as suggested by Alistair in sysreg and ssi.
v7:
Removed vmstate_register_ram_global as per latest commit
Moved header files to C which are local to C source files
Removed abort() from msf2-sysreg.c
Added VMStateDescription in mss-timer.c
v6:
Moved some defines from header files to source files
Added properties m3clk, apb0div, apb0div1 properties
to soc.
Added properties apb0divisor, apb1divisor to sysreg
Update system_clock_source in msf2-soc.c
Changed machine name smartfusion2-som->emcraft-sf2
v5
As per Philippe comments:
Added abort in Sysreg if guest tries to remap memory
other than default mapping.
Use of CONFIG_MSF2 in Makefile for soc.c
Fixed incorrect logic in timer model.
Renamed msf2-timer.c -> mss-timer.c
msf2-spi.c -> mss-spi.c also type names
Renamed function msf2_init->emcraft_sf2_init in msf2-som.c
Added part-name,eNVM-size,eSRAM-size,pclk0 and pclk1
properties to soc.
Pass soc part-name,memory size and clock rate properties from som.
v4:
Fixed build failure by using PRIx macros.
v3:
Added SoC file and board file as per Alistair comments.
v2:
Added SPI controller so that u-boot loads kernel from spi flash.
v1:
Initial patch set with timer and sysreg
Thanks,
Sundeep
Subbaraya Sundeep (5):
msf2: Add Smartfusion2 System timer
msf2: Microsemi Smartfusion2 System Register block
msf2: Add Smartfusion2 SPI controller
msf2: Add Smartfusion2 SoC
msf2: Add Emcraft's Smartfusion2 SOM kit
default-configs/arm-softmmu.mak | 1 +
hw/arm/Makefile.objs | 1 +
hw/arm/msf2-soc.c | 218 ++++++++++++++++++++++
hw/arm/msf2-som.c | 95 ++++++++++
hw/misc/Makefile.objs | 1 +
hw/misc/msf2-sysreg.c | 195 +++++++++++++++++++
hw/ssi/Makefile.objs | 1 +
hw/ssi/mss-spi.c | 404 ++++++++++++++++++++++++++++++++++++++++
hw/timer/Makefile.objs | 1 +
hw/timer/mss-timer.c | 289 ++++++++++++++++++++++++++++
include/hw/arm/msf2-soc.h | 66 +++++++
include/hw/misc/msf2-sysreg.h | 78 ++++++++
include/hw/ssi/mss-spi.h | 58 ++++++
include/hw/timer/mss-timer.h | 64 +++++++
14 files changed, 1472 insertions(+)
create mode 100644 hw/arm/msf2-soc.c
create mode 100644 hw/arm/msf2-som.c
create mode 100644 hw/misc/msf2-sysreg.c
create mode 100644 hw/ssi/mss-spi.c
create mode 100644 hw/timer/mss-timer.c
create mode 100644 include/hw/arm/msf2-soc.h
create mode 100644 include/hw/misc/msf2-sysreg.h
create mode 100644 include/hw/ssi/mss-spi.h
create mode 100644 include/hw/timer/mss-timer.h
--
2.5.0
- [Qemu-devel] [Qemu devel v8 PATCH 0/5] Add support for Smartfusion2 SoC,
Subbaraya Sundeep <=
- [Qemu-devel] [Qemu devel v8 PATCH 1/5] msf2: Add Smartfusion2 System timer, Subbaraya Sundeep, 2017/09/07
- [Qemu-devel] [Qemu devel v8 PATCH 2/5] msf2: Microsemi Smartfusion2 System Register block, Subbaraya Sundeep, 2017/09/07
- Re: [Qemu-devel] [Qemu devel v8 PATCH 2/5] msf2: Microsemi Smartfusion2 System Register block, Philippe Mathieu-Daudé, 2017/09/14
- Re: [Qemu-devel] [Qemu devel v8 PATCH 2/5] msf2: Microsemi Smartfusion2 System Register block, Peter Maydell, 2017/09/14
- Re: [Qemu-devel] [Qemu devel v8 PATCH 2/5] msf2: Microsemi Smartfusion2 System Register block, sundeep subbaraya, 2017/09/14
- Re: [Qemu-devel] [Qemu devel v8 PATCH 2/5] msf2: Microsemi Smartfusion2 System Register block, Philippe Mathieu-Daudé, 2017/09/14
- Re: [Qemu-devel] [Qemu devel v8 PATCH 2/5] msf2: Microsemi Smartfusion2 System Register block, sundeep subbaraya, 2017/09/14
- Re: [Qemu-devel] [Qemu devel v8 PATCH 2/5] msf2: Microsemi Smartfusion2 System Register block, Philippe Mathieu-Daudé, 2017/09/17
- Re: [Qemu-devel] [Qemu devel v8 PATCH 2/5] msf2: Microsemi Smartfusion2 System Register block, sundeep subbaraya, 2017/09/18
- [Qemu-devel] [Qemu devel v8 PATCH 3/5] msf2: Add Smartfusion2 SPI controller, Subbaraya Sundeep, 2017/09/07