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Re: [Qemu-devel] How to check if Vt-d is capable of posted-interrupt?
From: |
Alex Williamson |
Subject: |
Re: [Qemu-devel] How to check if Vt-d is capable of posted-interrupt? |
Date: |
Mon, 30 Apr 2018 12:09:41 -0600 |
On Mon, 30 Apr 2018 13:44:23 -0400
Jintack Lim <address@hidden> wrote:
> Add iommu mailing list since this question might be more related to iommu.
>
> On Mon, Apr 30, 2018 at 10:11 AM, Jintack Lim <address@hidden> wrote:
> > Hi,
> >
> > I wonder how to check if Vt-d is capable of posted-interrupt? I'm
> > using Intel E5-2630 v3.
> >
> > I was once told that APICv and posted-interrupt capability always come
> > together. But it seems like my cpu support APICv
> > (/sys/module/kvm_intel/parameters/enable_apicv is Y), but
> > posted-interrupt capability is only shipped with the next generation
> > of the cpu (E5-2600 v4, which is Broadwell).
> >
> > What would be an easy way to check this?
PI support is bit 59 in the capability register which is exposed
through sysfs at /sys/class/iommu/dmar*/intel-iommu/cap so you could do
something like:
# for i in $(find /sys/class/iommu/dmar* -type l); do echo -n "$i: "; echo $((
( 0x$(cat $i/intel-iommu/cap) >> 59 ) & 1 )); done
I think the relationship between APICv and PI goes the other direction,
if you have PI, you probably have APICv. Having APICv implies nothing
about having PI. Thanks,
Alex