[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v4 12/20] intc/arm_gic: Implement virtualization ext
From: |
Luc Michel |
Subject: |
[Qemu-devel] [PATCH v4 12/20] intc/arm_gic: Implement virtualization extensions in gic_(deactivate|complete_irq) |
Date: |
Sat, 14 Jul 2018 19:15:53 +0200 |
Implement virtualization extensions in the gic_deactivate_irq() and
gic_complete_irq() functions. When a guest tries to deactivat or end an
IRQ that does not exist in the LRs, the EOICount field of the virtual
interface HCR register is incremented by one, and the request is
ignored.
Signed-off-by: Luc Michel <address@hidden>
---
hw/intc/arm_gic.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index be9e2594d9..50cbbfbe24 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -590,6 +590,15 @@ static void gic_deactivate_irq(GICState *s, int cpu, int
irq, MemTxAttrs attrs)
return;
}
+ if (gic_is_vcpu(cpu) && !gic_virq_is_valid(s, irq, cpu)) {
+ /* This vIRQ does not have an LR entry which is either active or
+ * pending and active. Increment EOICount and ignore the write.
+ */
+ int rcpu = gic_get_vcpu_real_id(cpu);
+ s->h_hcr[rcpu] += 1 << R_GICH_HCR_EOICount_SHIFT;
+ return;
+ }
+
if (gic_cpu_ns_access(s, cpu, attrs) && !group) {
DPRINTF("Non-secure DI for Group0 interrupt %d ignored\n", irq);
return;
@@ -604,6 +613,15 @@ static void gic_complete_irq(GICState *s, int cpu, int
irq, MemTxAttrs attrs)
int group;
DPRINTF("EOI %d\n", irq);
+ if (gic_is_vcpu(cpu) && !gic_virq_is_valid(s, irq, cpu)) {
+ /* This vIRQ does not have an LR entry which is either active or
+ * pending and active. Increment EOICount and ignore the write.
+ */
+ int rcpu = gic_get_vcpu_real_id(cpu);
+ s->h_hcr[rcpu] += 1 << R_GICH_HCR_EOICount_SHIFT;
+ return;
+ }
+
if (irq >= s->num_irq) {
/* This handles two cases:
* 1. If software writes the ID of a spurious interrupt [ie 1023]
--
2.18.0
- [Qemu-devel] [PATCH v4 04/20] vmstate.h: Provide VMSTATE_UINT16_SUB_ARRAY, (continued)
- [Qemu-devel] [PATCH v4 04/20] vmstate.h: Provide VMSTATE_UINT16_SUB_ARRAY, Luc Michel, 2018/07/14
- [Qemu-devel] [PATCH v4 13/20] intc/arm_gic: Implement virtualization extensions in gic_cpu_(read|write), Luc Michel, 2018/07/14
- [Qemu-devel] [PATCH v4 08/20] intc/arm_gic: Refactor secure/ns access check in the CPU interface, Luc Michel, 2018/07/14
- [Qemu-devel] [PATCH v4 11/20] intc/arm_gic: Implement virtualization extensions in gic_acknowledge_irq, Luc Michel, 2018/07/14
- [Qemu-devel] [PATCH v4 17/20] intc/arm_gic: Implement maintenance interrupt generation, Luc Michel, 2018/07/14
- [Qemu-devel] [PATCH v4 20/20] arm/virt: Add support for GICv2 virtualization extensions, Luc Michel, 2018/07/14
- [Qemu-devel] [PATCH v4 19/20] xlnx-zynqmp: Improve GIC wiring and MMIO mapping, Luc Michel, 2018/07/14
- [Qemu-devel] [PATCH v4 15/20] intc/arm_gic: Implement the virtual interface registers, Luc Michel, 2018/07/14
- [Qemu-devel] [PATCH v4 12/20] intc/arm_gic: Implement virtualization extensions in gic_(deactivate|complete_irq),
Luc Michel <=
- [Qemu-devel] [PATCH v4 16/20] intc/arm_gic: Implement gic_update_virt() function, Luc Michel, 2018/07/14
- [Qemu-devel] [PATCH v4 18/20] intc/arm_gic: Improve traces, Luc Michel, 2018/07/14
- [Qemu-devel] [PATCH v4 05/20] intc/arm_gic: Add the virtualization extensions to the GIC state, Luc Michel, 2018/07/14
- [Qemu-devel] [PATCH v4 01/20] intc/arm_gic: Refactor operations on the distributor, Luc Michel, 2018/07/14
- Re: [Qemu-devel] [PATCH v4 00/20] arm_gic: add virtualization extensions support, Peter Maydell, 2018/07/17