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[Qemu-devel] [RFC PATCH 3/3] i386: custom cache size in AMD's CPUID desc
From: |
Dario Faggioli |
Subject: |
[Qemu-devel] [RFC PATCH 3/3] i386: custom cache size in AMD's CPUID descriptors too |
Date: |
Wed, 14 Nov 2018 11:57:09 +0100 |
User-agent: |
StGit/0.17.1-dirty |
If specified on the command line, alter the cache size(s)
properties accordingly, before encoding them in the AMD's
CPUID cache descriptors too (i.e., 80000006 and 8000001d).
Signed-off-by: Dario Faggioli <address@hidden>
---
Cc: Paolo Bonzini <address@hidden>
Cc: Richard Henderson <address@hidden>
Cc: Eduardo Habkost <address@hidden>
---
0 files changed
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 17aff19561..4949d6b907 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -4490,6 +4490,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
(L2_DTLB_4K_ENTRIES << 16) | \
(AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) | \
(L2_ITLB_4K_ENTRIES);
+ if (cpu->l2_cache_size > 0)
+ set_custom_cache_size(env->cache_info_amd.l2_cache,
+ cpu->l2_cache_size);
+ if (cpu->enable_l3_cache && cpu->l3_cache_size > 0)
+ set_custom_cache_size(env->cache_info_amd.l3_cache,
+ cpu->l3_cache_size);
encode_cache_cpuid80000006(env->cache_info_amd.l2_cache,
cpu->enable_l3_cache ?
env->cache_info_amd.l3_cache : NULL,
@@ -4546,10 +4552,16 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
eax, ebx, ecx, edx);
break;
case 2: /* L2 cache info */
+ if (cpu->l2_cache_size > 0)
+ set_custom_cache_size(env->cache_info_amd.l2_cache,
+ cpu->l2_cache_size * MiB);
encode_cache_cpuid8000001d(env->cache_info_amd.l2_cache, cs,
eax, ebx, ecx, edx);
break;
case 3: /* L3 cache info */
+ if (cpu->enable_l3_cache && cpu->l3_cache_size > 0)
+ set_custom_cache_size(env->cache_info_amd.l3_cache,
+ cpu->l3_cache_size * MiB);
encode_cache_cpuid8000001d(env->cache_info_amd.l3_cache, cs,
eax, ebx, ecx, edx);
break;