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[Qemu-devel] [PULL v2 01/11] linux-user: Update MIPS specific prctl() im
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL v2 01/11] linux-user: Update MIPS specific prctl() implementation |
Date: |
Sat, 17 Nov 2018 19:38:18 +0100 |
From: Stefan Markovic <address@hidden>
Perform needed checks before actual prctl() PR_SET_FP_MODE and
PR_GET_FP_MODE work based on kernel implementation. Also, update
necessary hflags.
Reviewed-by: Laurent Vivier <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
---
linux-user/syscall.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 5c16692..280137d 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -9554,9 +9554,25 @@ static abi_long do_syscall1(void *cpu_env, int num,
abi_long arg1,
{
CPUMIPSState *env = ((CPUMIPSState *)cpu_env);
bool old_fr = env->CP0_Status & (1 << CP0St_FR);
+ bool old_fre = env->CP0_Config5 & (1 << CP0C5_FRE);
bool new_fr = arg2 & TARGET_PR_FP_MODE_FR;
bool new_fre = arg2 & TARGET_PR_FP_MODE_FRE;
+ const unsigned int known_bits = TARGET_PR_FP_MODE_FR |
+ TARGET_PR_FP_MODE_FRE;
+
+ /* If nothing to change, return right away, successfully. */
+ if (old_fr == new_fr && old_fre == new_fre) {
+ return 0;
+ }
+ /* Check the value is valid */
+ if (arg2 & ~known_bits) {
+ return -TARGET_EOPNOTSUPP;
+ }
+ /* Setting FRE without FR is not supported. */
+ if (new_fre && !new_fr) {
+ return -TARGET_EOPNOTSUPP;
+ }
if (new_fr && !(env->active_fpu.fcr0 & (1 << FCR0_F64))) {
/* FR1 is not supported */
return -TARGET_EOPNOTSUPP;
@@ -9586,6 +9602,7 @@ static abi_long do_syscall1(void *cpu_env, int num,
abi_long arg1,
env->hflags |= MIPS_HFLAG_F64;
} else {
env->CP0_Status &= ~(1 << CP0St_FR);
+ env->hflags &= ~MIPS_HFLAG_F64;
}
if (new_fre) {
env->CP0_Config5 |= (1 << CP0C5_FRE);
@@ -9594,6 +9611,7 @@ static abi_long do_syscall1(void *cpu_env, int num,
abi_long arg1,
}
} else {
env->CP0_Config5 &= ~(1 << CP0C5_FRE);
+ env->hflags &= ~MIPS_HFLAG_FRE;
}
return 0;
--
2.7.4
- [Qemu-devel] [PULL v2 00/11] MIPS queue for November 2018 (for QEMU 3.1-rc2) - v2, Aleksandar Markovic, 2018/11/17
- [Qemu-devel] [PULL v2 05/11] target/mips: Guard check_insn_opc_user_only with INSN_R5900 check, Aleksandar Markovic, 2018/11/17
- [Qemu-devel] [PULL v2 04/11] target/mips: Fix decoding mechanism of special R5900 opcodes, Aleksandar Markovic, 2018/11/17
- [Qemu-devel] [PULL v2 02/11] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1, Aleksandar Markovic, 2018/11/17
- [Qemu-devel] [PULL v2 06/11] target/mips: Guard check_insn with INSN_R5900 check, Aleksandar Markovic, 2018/11/17
- [Qemu-devel] [PULL v2 10/11] target/mips: Disable R5900 support, Aleksandar Markovic, 2018/11/17
- [Qemu-devel] [PULL v2 07/11] target/mips: Rename MMI-related masks, Aleksandar Markovic, 2018/11/17
- [Qemu-devel] [PULL v2 09/11] target/mips: Rename MMI-related functions, Aleksandar Markovic, 2018/11/17
- [Qemu-devel] [PULL v2 01/11] linux-user: Update MIPS specific prctl() implementation,
Aleksandar Markovic <=
- [Qemu-devel] [PULL v2 03/11] target/mips: Fix decoding mechanism of R5900 DIV1 and DIVU1, Aleksandar Markovic, 2018/11/17
- [Qemu-devel] [PULL v2 08/11] target/mips: Rename MMI-related opcodes, Aleksandar Markovic, 2018/11/17
- [Qemu-devel] [PULL v2 11/11] MAINTAINERS: Add Stefan Markovic as a MIPS reviewer, Aleksandar Markovic, 2018/11/17
- Re: [Qemu-devel] [PULL v2 00/11] MIPS queue for November 2018 (for QEMU 3.1-rc2) - v2, Peter Maydell, 2018/11/19