[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [RFC PATCH v2 1/3] target/ppc: Add macro definitions for re
From: |
Fabiano Rosas |
Subject: |
[Qemu-devel] [RFC PATCH v2 1/3] target/ppc: Add macro definitions for relocated interrupt vectors offsets |
Date: |
Wed, 21 Nov 2018 16:13:45 -0200 |
The PowerISA prescribes that depending on the values of MSR_IR,
MSR_DR, MSR_HV and LPCR_AIL, the interrupt vectors might be relocated
by specific offsets.
This patch defines macros for these offsets so that they can be used
by another part of the code in a future patch.
Signed-off-by: Fabiano Rosas <address@hidden>
---
target/ppc/cpu.h | 3 +++
target/ppc/excp_helper.c | 4 ++--
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index ab68abe8a2..5147db4460 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -2390,6 +2390,9 @@ enum {
AIL_C000_0000_0000_4000 = 3,
};
+#define AIL_0001_8000_OFFSET 0x18000
+#define AIL_C000_0000_0000_4000_OFFSET 0xc000000000004000ull
+
/*****************************************************************************/
#define is_isa300(ctx) (!!(ctx->insns_flags2 & PPC2_ISA300))
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 0ec7ae1ad4..49bdf7dd54 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -687,10 +687,10 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
excp_model, int excp)
new_msr |= (1 << MSR_IR) | (1 << MSR_DR);
switch(ail) {
case AIL_0001_8000:
- vector |= 0x18000;
+ vector |= AIL_0001_8000_OFFSET;
break;
case AIL_C000_0000_0000_4000:
- vector |= 0xc000000000004000ull;
+ vector |= AIL_C000_0000_0000_4000_OFFSET;
break;
default:
cpu_abort(cs, "Invalid AIL combination %d\n", ail);
--
2.17.1