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Re: [Qemu-devel] [PATCH for-4.0 v2 06/37] tcg/i386: Return a base regist
From: |
Alex Bennée |
Subject: |
Re: [Qemu-devel] [PATCH for-4.0 v2 06/37] tcg/i386: Return a base register from tcg_out_tlb_load |
Date: |
Thu, 29 Nov 2018 16:34:40 +0000 |
User-agent: |
mu4e 1.1.0; emacs 26.1.90 |
Richard Henderson <address@hidden> writes:
> We will shortly be asking the hot path not to assume TCG_REG_L1
> for the host base address.
>
> Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
> ---
> tcg/i386/tcg-target.inc.c | 56 ++++++++++++++++++++-------------------
> 1 file changed, 29 insertions(+), 27 deletions(-)
>
> diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
> index 8aef66e430..3234a8d8bf 100644
> --- a/tcg/i386/tcg-target.inc.c
> +++ b/tcg/i386/tcg-target.inc.c
> @@ -1614,9 +1614,9 @@ static void * const qemu_st_helpers[16] = {
>
> First argument register is clobbered. */
>
> -static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg
> addrhi,
> - int mem_index, TCGMemOp opc,
> - tcg_insn_unit **label_ptr, int which)
> +static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
> + int mem_index, TCGMemOp opc,
> + tcg_insn_unit **label_ptr, int which)
> {
> const TCGReg r0 = TCG_REG_L0;
> const TCGReg r1 = TCG_REG_L1;
> @@ -1696,6 +1696,8 @@ static inline void tcg_out_tlb_load(TCGContext *s,
> TCGReg addrlo, TCGReg addrhi,
> /* add addend(r0), r1 */
> tcg_out_modrm_offset(s, OPC_ADD_GvEv + hrexw, r1, r0,
> offsetof(CPUTLBEntry, addend) - which);
> +
> + return r1;
> }
>
> /*
> @@ -2001,10 +2003,6 @@ static void tcg_out_qemu_ld(TCGContext *s, const
> TCGArg *args, bool is64)
> TCGReg addrhi __attribute__((unused));
> TCGMemOpIdx oi;
> TCGMemOp opc;
> -#if defined(CONFIG_SOFTMMU)
> - int mem_index;
> - tcg_insn_unit *label_ptr[2];
> -#endif
>
> datalo = *args++;
> datahi = (TCG_TARGET_REG_BITS == 32 && is64 ? *args++ : 0);
> @@ -2014,17 +2012,21 @@ static void tcg_out_qemu_ld(TCGContext *s, const
> TCGArg *args, bool is64)
> opc = get_memop(oi);
>
> #if defined(CONFIG_SOFTMMU)
> - mem_index = get_mmuidx(oi);
> + {
> + int mem_index = get_mmuidx(oi);
> + tcg_insn_unit *label_ptr[2];
> + TCGReg base;
>
> - tcg_out_tlb_load(s, addrlo, addrhi, mem_index, opc,
> - label_ptr, offsetof(CPUTLBEntry, addr_read));
> + base = tcg_out_tlb_load(s, addrlo, addrhi, mem_index, opc,
> + label_ptr, offsetof(CPUTLBEntry, addr_read));
>
> - /* TLB Hit. */
> - tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc);
> + /* TLB Hit. */
> + tcg_out_qemu_ld_direct(s, datalo, datahi, base, -1, 0, 0, opc);
>
> - /* Record the current context of a load into ldst label */
> - add_qemu_ldst_label(s, true, oi, datalo, datahi, addrlo, addrhi,
> - s->code_ptr, label_ptr);
> + /* Record the current context of a load into ldst label */
> + add_qemu_ldst_label(s, true, oi, datalo, datahi, addrlo, addrhi,
> + s->code_ptr, label_ptr);
> + }
> #else
> {
> int32_t offset = guest_base;
> @@ -2141,10 +2143,6 @@ static void tcg_out_qemu_st(TCGContext *s, const
> TCGArg *args, bool is64)
> TCGReg addrhi __attribute__((unused));
> TCGMemOpIdx oi;
> TCGMemOp opc;
> -#if defined(CONFIG_SOFTMMU)
> - int mem_index;
> - tcg_insn_unit *label_ptr[2];
> -#endif
>
> datalo = *args++;
> datahi = (TCG_TARGET_REG_BITS == 32 && is64 ? *args++ : 0);
> @@ -2154,17 +2152,21 @@ static void tcg_out_qemu_st(TCGContext *s, const
> TCGArg *args, bool is64)
> opc = get_memop(oi);
>
> #if defined(CONFIG_SOFTMMU)
> - mem_index = get_mmuidx(oi);
> + {
> + int mem_index = get_mmuidx(oi);
> + tcg_insn_unit *label_ptr[2];
> + TCGReg base;
>
> - tcg_out_tlb_load(s, addrlo, addrhi, mem_index, opc,
> - label_ptr, offsetof(CPUTLBEntry, addr_write));
> + base = tcg_out_tlb_load(s, addrlo, addrhi, mem_index, opc,
> + label_ptr, offsetof(CPUTLBEntry,
> addr_write));
>
> - /* TLB Hit. */
> - tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, 0, 0, opc);
> + /* TLB Hit. */
> + tcg_out_qemu_st_direct(s, datalo, datahi, base, 0, 0, opc);
>
> - /* Record the current context of a store into ldst label */
> - add_qemu_ldst_label(s, false, oi, datalo, datahi, addrlo, addrhi,
> - s->code_ptr, label_ptr);
> + /* Record the current context of a store into ldst label */
> + add_qemu_ldst_label(s, false, oi, datalo, datahi, addrlo, addrhi,
> + s->code_ptr, label_ptr);
> + }
> #else
> {
> int32_t offset = guest_base;
--
Alex Bennée
- [Qemu-devel] [PATCH for-4.0 v2 00/37] tcg: Assorted cleanups, Richard Henderson, 2018/11/23
- [Qemu-devel] [PATCH for-4.0 v2 01/37] tcg/i386: Always use %ebp for TCG_AREG0, Richard Henderson, 2018/11/23
- [Qemu-devel] [PATCH for-4.0 v2 02/37] tcg/i386: Move TCG_REG_CALL_STACK from define to enum, Richard Henderson, 2018/11/23
- [Qemu-devel] [PATCH for-4.0 v2 07/37] tcg/i386: Change TCG_REG_L[01] to not overlap function arguments, Richard Henderson, 2018/11/23
- [Qemu-devel] [PATCH for-4.0 v2 06/37] tcg/i386: Return a base register from tcg_out_tlb_load, Richard Henderson, 2018/11/23
- Re: [Qemu-devel] [PATCH for-4.0 v2 06/37] tcg/i386: Return a base register from tcg_out_tlb_load,
Alex Bennée <=
- [Qemu-devel] [PATCH for-4.0 v2 03/37] tcg: Return success from patch_reloc, Richard Henderson, 2018/11/23
- [Qemu-devel] [PATCH for-4.0 v2 05/37] tcg/i386: Add constraints for r8 and r9, Richard Henderson, 2018/11/23
- [Qemu-devel] [PATCH for-4.0 v2 04/37] tcg: Add TCG_TARGET_NEED_LDST_OOL_LABELS, Richard Henderson, 2018/11/23
- [Qemu-devel] [PATCH for-4.0 v2 10/37] tcg/aarch64: Add constraints for x0, x1, x2, Richard Henderson, 2018/11/23
- [Qemu-devel] [PATCH for-4.0 v2 11/37] tcg/aarch64: Parameterize the temps for tcg_out_tlb_read, Richard Henderson, 2018/11/23