Re: [Qemu-devel] [PATCH] target/arm: Set SIMDMISC and FPMISC for 32-bit -cpu max

[Alex Bennée]

Richard Henderson <address@hidden> writes:

> Fixes: https://bugs.launchpad.net/bugs/1821430
> Signed-off-by: Richard Henderson <address@hidden>
> ---
>  target/arm/cpu.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 96f0ff0ec7..d9b8658921 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -2025,6 +2025,11 @@ static void arm_max_initfn(Object *obj)
>              t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1);
>              cpu->isar.id_isar6 = t;
>
> +            t = cpu->isar.mvfr2;
> +            t = FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */
> +            t = FIELD_DP32(t, MVFR2, FPMISC, 4);   /* FP MaxNum */
> +            cpu->isar.mvfr2 = t;
> +

heh:

  In ARMv8-A, the permitted values are 0b0000 and 0b0100

and similar for SIMDMisc. I guess you might see the others in some none
A profile setup? Anyway:

Reviewed-by: Alex Bennée <address@hidden>

--
Alex Bennée