[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH] q35: fix mmconfig and PCI0._CRS
From: |
Gerd Hoffmann |
Subject: |
Re: [Qemu-devel] [PATCH] q35: fix mmconfig and PCI0._CRS |
Date: |
Mon, 3 Jun 2019 16:24:33 +0200 |
User-agent: |
NeoMutt/20180716 |
Hi,
> One question: are we sure all guest OSes we care about can deal with
> discontiguous 32-bit PCI MMIO aperture(s)? Personally, I've got no clue.
> Is a "naïve" OS imaginable that looks only at the first suitable range
> in the _CRS?
Well, I know there is physical hardware doing the same thing,
my work station for example:
[ ... ]
c8000000-f7ffffff : PCI Bus 0000:00
c8000000-c81fffff : PCI Bus 0000:01
e0000000-efffffff : 0000:00:02.0
e0000000-e02fffff : BOOTFB
[ ... ]
f8000000-fbffffff : PCI MMCONFIG 0000 [bus 00-3f]
f8000000-fbffffff : Reserved
f8000000-fbffffff : pnp 00:06
fd000000-fe7fffff : PCI Bus 0000:00
fd000000-fdabffff : pnp 00:07
[ ... ]
Which of course is no guarantee that no naïve OS exists, but I think the
chances that we'll run into trouble with this are rather small.
cheers,
Gerd