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[Qemu-devel] [PATCH v18 17/29] hw/rx: Honor -accel qtest
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-devel] [PATCH v18 17/29] hw/rx: Honor -accel qtest |
Date: |
Fri, 7 Jun 2019 17:37:13 +0200 |
From: Richard Henderson <address@hidden>
Issue an error if no kernel, no bios, and not qtest'ing.
Fixes make check-qtest-rx: test/qom-test.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Yoshinori Sato <address@hidden>
Message-Id: <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
hw/rx/rx62n.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/rx/rx62n.c b/hw/rx/rx62n.c
index 3a8fe7b0bf..e55257c622 100644
--- a/hw/rx/rx62n.c
+++ b/hw/rx/rx62n.c
@@ -21,11 +21,13 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu/error-report.h"
#include "hw/hw.h"
#include "hw/rx/rx62n.h"
#include "hw/loader.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
+#include "sysemu/qtest.h"
#include "cpu.h"
/*
@@ -190,8 +192,14 @@ static void rx62n_realize(DeviceState *dev, Error **errp)
memory_region_init_rom(&s->c_flash, NULL, "codeflash",
RX62N_CFLASH_SIZE, errp);
memory_region_add_subregion(s->sysmem, RX62N_CFLASH_BASE, &s->c_flash);
+
if (!s->kernel) {
- rom_add_file_fixed(bios_name, RX62N_CFLASH_BASE, 0);
+ if (bios_name) {
+ rom_add_file_fixed(bios_name, RX62N_CFLASH_BASE, 0);
+ } else if (!qtest_enabled()) {
+ error_report("No bios or kernel specified");
+ exit(1);
+ }
}
object_initialize_child(OBJECT(s), "cpu", &s->cpu,
--
2.20.1
- [Qemu-devel] [PATCH v18 20/29] target/rx: Disassemble rx_index_addr into a string, (continued)
- [Qemu-devel] [PATCH v18 15/29] target/rx: Add RX to SysEmuTarget, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 19/29] MAINTAINERS: Add RX, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 17/29] hw/rx: Honor -accel qtest,
Philippe Mathieu-Daudé <=
- [Qemu-devel] [PATCH v18 16/29] tests: Add rx to machine-none-test.c, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 14/29] target/rx: Convert to CPUClass::tlb_fill, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 12/29] qemu/bitops.h: Add extract8 and extract16, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 13/29] hw/registerfields.h: Add 8bit and 16bit register macros, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 05/29] !fixup target/rx: CPU definition, Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 09/29] hw/char: RX62N serial communication interface (SCI), Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 07/29] hw/intc: RX62N interrupt controller (ICUa), Philippe Mathieu-Daudé, 2019/06/07
- [Qemu-devel] [PATCH v18 02/29] target/rx: TCG helper, Philippe Mathieu-Daudé, 2019/06/07