[Qemu-devel] [PATCH v3] The m68k gdbstub SR reg request doesnt include Condition-Codes

[Lucien Murray-Pitts]

The register request via gdbstub would return the SR part
which contains the Trace/Master/IRQ state flags, but
would be missing the CR (Condition Register) state bits.

This fix adds this support by merging them in the m68k
specific gdbstub handler m68k_cpu_gdb_read_register for SR register.

Signed-off-by: Lucien Murray-Pitts <address@hidden>
---

Notes:
    v1->v2
       - removed my superfluous braces
       - slightly amended the commit message
    
    v2->v3
       - removed my incorrect use of code block in a switch

 target/m68k/gdbstub.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/m68k/gdbstub.c b/target/m68k/gdbstub.c
index fd2bb46c42..6e7f3b8980 100644
--- a/target/m68k/gdbstub.c
+++ b/target/m68k/gdbstub.c
@@ -36,7 +36,8 @@ int m68k_cpu_gdb_read_register(CPUState *cs, uint8_t 
*mem_buf, int n)
     } else {
         switch (n) {
         case 16:
-            return gdb_get_reg32(mem_buf, env->sr);
+            /* SR is made of SR+CCR, CCR is many 1bit flags so uses helper */
+            return gdb_get_reg32(mem_buf, env->sr | cpu_m68k_get_ccr(env));
         case 17:
             return gdb_get_reg32(mem_buf, env->pc);
         }
-- 
2.21.0