Re: [Qemu-devel] [PATCH v21 4/7] target/avr: Add instruction translation

[Michael Rolnik]

I am using this one
https://github.com/seharris/qemu-avr-tests/blob/master/free-rtos/Demo
/AVR_ATMega2560_GCC/demo.elf
it fails within __divmodsi4 function, there is rcall right after sbrc.

Thanks for helping.

On Tue, Jun 11, 2019 at 11:47 PM Richard Henderson <
address@hidden> wrote:

> On 6/11/19 1:21 PM, Michael Rolnik wrote:
> > I merged all you fixes and I get an assert(use_icount)
> in cpu_loop_exec_tb
> > function, it happens on an instruction following SBRC.
> > what might cause it?
>
> No idea.  What is your test case?  And your tree, just in case there was an
> error in the merging.
>
> Looking through output from
>
>   qemu-avr-tests/instruction-tests/bin/SBR.elf
>
>      14a:       00 fc           sbrc    r0, 0
>      14c:       0f ef           ldi     r16, 0xFF       ; 255
>
> it works for me:
>
>  ---- 000000a5
>  movi_i32 tmp2,$0x1
>  and_i32 tmp1,r0,tmp2
>
>  ---- 000000a6
>  movi_i32 tmp2,$0x0
>  brcond_i32 tmp1,tmp2,eq,$L1
>  movi_i32 r16,$0xff
>  set_label $L1
>
>
> r~
>


-- 
Best Regards,
Michael Rolnik