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[Qemu-devel] [Bug 1832535] [NEW] [riscv/regression] Missing tlb flush in


From: QEMU
Subject: [Qemu-devel] [Bug 1832535] [NEW] [riscv/regression] Missing tlb flush introduced in refactoring
Date: Wed, 12 Jun 2019 12:32:51 -0000

Public bug reported:

Hello,

In qemu-system-riscv64, following a QEMU update, I get all sort of weird
and not easily reproducible crashes in my risc-v guest.

I have bissected this issue to commit c7b951718815694284501ed01fec7acb8654db7b.
Some TLB flushes were removed in the following places:
target/riscv/cpu_helper.c: `csr_write_helper(env, s, CSR_MSTATUS);` -> 
`env->mstatus = s;` (twice)
target/riscv/op_helper.c: `csr_write_helper(env, s, CSR_MSTATUS);` -> 
`env->mstatus = s;` (twice)

Adding TLB flushes in all 4 places fixes the issues for me.

** Affects: qemu
     Importance: Undecided
         Status: New


** Tags: riscv

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https://bugs.launchpad.net/bugs/1832535

Title:
  [riscv/regression] Missing tlb flush introduced in refactoring

Status in QEMU:
  New

Bug description:
  Hello,

  In qemu-system-riscv64, following a QEMU update, I get all sort of
  weird and not easily reproducible crashes in my risc-v guest.

  I have bissected this issue to commit 
c7b951718815694284501ed01fec7acb8654db7b.
  Some TLB flushes were removed in the following places:
  target/riscv/cpu_helper.c: `csr_write_helper(env, s, CSR_MSTATUS);` -> 
`env->mstatus = s;` (twice)
  target/riscv/op_helper.c: `csr_write_helper(env, s, CSR_MSTATUS);` -> 
`env->mstatus = s;` (twice)

  Adding TLB flushes in all 4 places fixes the issues for me.

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