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[PATCH v2 14/14] target/arm: Enable ARMv8.2-UAO in -cpu max
From: |
Richard Henderson |
Subject: |
[PATCH v2 14/14] target/arm: Enable ARMv8.2-UAO in -cpu max |
Date: |
Sat, 1 Feb 2020 17:04:39 -0800 |
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/cpu64.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 57fbc5eade..1359564c55 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -676,6 +676,10 @@ static void aarch64_max_initfn(Object *obj)
t = FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* ATS1E1 */
cpu->isar.id_aa64mmfr1 = t;
+ t = cpu->isar.id_aa64mmfr2;
+ t = FIELD_DP64(t, ID_AA64MMFR2, UAO, 1);
+ cpu->isar.id_aa64mmfr2 = t;
+
/* Replicate the same data to the 32-bit id registers. */
u = cpu->isar.id_isar5;
u = FIELD_DP32(u, ID_ISAR5, AES, 2); /* AES + PMULL */
--
2.20.1
- Re: [PATCH v2 03/14] target/arm: Add isar_feature tests for PAN + ATS1E1, (continued)
- [PATCH v2 05/14] target/arm: Update MSR access for PAN, Richard Henderson, 2020/02/01
- [PATCH v2 06/14] target/arm: Update arm_mmu_idx_el for PAN, Richard Henderson, 2020/02/01
- [PATCH v2 07/14] target/arm: Enforce PAN semantics in get_S1prot, Richard Henderson, 2020/02/01
- [PATCH v2 08/14] target/arm: Set PAN bit as required on exception entry, Richard Henderson, 2020/02/01
- [PATCH v2 09/14] target/arm: Implement ATS1E1 system registers, Richard Henderson, 2020/02/01
- [PATCH v2 10/14] target/arm: Enable ARMv8.2-ATS1E1 in -cpu max, Richard Henderson, 2020/02/01
- [PATCH v2 14/14] target/arm: Enable ARMv8.2-UAO in -cpu max,
Richard Henderson <=
- [PATCH v2 13/14] target/arm: Implement UAO semantics, Richard Henderson, 2020/02/01
- [PATCH v2 12/14] target/arm: Update MSR access to UAO, Richard Henderson, 2020/02/01
- [PATCH v2 11/14] target/arm: Add ID_AA64MMFR2_EL1, Richard Henderson, 2020/02/01