[Bug 1859291] Re: RISC-V incorrect exception generated

[Teodori Serge]

code from machine mode:
<pre>
        /* TEST jump to supervisor mode */
        if(mhartid == 3){
                asm volatile ("csrw sepc, %[reg]; sret" : : [reg] "r" 
(&main_supervisor));
                log("main: jump to supervisor mode failed!\r\n");
        }
</pre>

here is supervisor mode function:
<pre>
void main_supervisor(){
        log("main: we are in supervisor mode, now calling to machine mode\r\n");
        asm volatile ("ecall");
        log("main: we returned to supervisor mode\r\n");
        for(;;){} // TODO supervisor mode not implemented, spin forever
}
</pre>

here is the machine mode interrupt handler:
<pre>
void main_mtrap(){
        uint64_t mhartid, mcause, mip;

        asm volatile ("csrr %[reg], mhartid" : [reg] "=r" (mhartid));
        asm volatile ("csrr %[reg], mcause" : [reg] "=r" (mcause));

        /* if most significant bit is set, 
         * then an interrupt is pending
         * else an exception occurred */
        switch(mcause){
        case 0x0:
                log("main: exception (Instruction address misaligned) on hart 
%x\r\n", mhartid);
                break;
        case 0x1:
                log("main: exception (Instruction access fault) on hart 
%x\r\n", mhartid);
                break;
        case 0x2:
                log("main: exception (Illegal instruction) on hart %x\r\n", 
mhartid);
                break;
        case 0x3:
                log("main: exception (Breakpoint) on hart %x\r\n", mhartid);
                break;
        case 0x4:
                log("main: exception (Load address misaligned) on hart %x\r\n", 
mhartid);
                break;
        case 0x5:
                log("main: exception (Load access fault) on hart %x\r\n", 
mhartid);
                break;
        case 0x6:
                log("main: exception (Store/AMO address misaligned) on hart 
%x\r\n", mhartid);
                break;
        case 0x7:
                log("main: exception (Store/AMO access fault) on hart %x\r\n", 
mhartid);
                break;
        case 0x8:
                log("main: exception (Environment call from U-mode) on hart 
%x\r\n", mhartid);
                break;
        case 0x9:
                log("main: exception (Environment call from S-mode) on hart 
%x\r\n", mhartid);
                break;
        case 0xa:
                log("main: exception (Reserved) on hart %x\r\n", mhartid);
                break;
        case 0xb:
                log("main: exception (Environment call from M-mode) on hart 
%x\r\n", mhartid);
                break;
        case 0xc:
                log("main: exception (Instruction page fault) on hart %x\r\n", 
mhartid);
                break;
        case 0xd:
                log("main: exception (Load page fault) on hart %x\r\n", 
mhartid);
                break;
        case 0xe:
                log("main: exception (Reserved) on hart %x\r\n", mhartid);
                break;
        case 0xf:
                log("main: exception (Store/AMO page fault) on hart %x\r\n", 
mhartid);
                break;
        case 0x8000000000000000:
                log("main: interrupt (User software interrupt) on hart %x\r\n", 
mhartid);
                break;
        case 0x8000000000000001:
                log("main: interrupt (Supervisor software interrupt) on hart 
%x\r\n", mhartid);
                break;
        case 0x8000000000000002:
                log("main: interrupt (Reserved) on hart %x\r\n", mhartid);
                break;
        case 0x8000000000000003:
                log("main: interrupt (Machine software interrupt) on hart 
%x\r\n", mhartid);
                clint_lower(&clint, mhartid);
                break;
        case 0x8000000000000004:
                log("main: interrupt (User timer interrupt) on hart %x\r\n", 
mhartid);
                break;
        case 0x8000000000000005:
                log("main: interrupt (Supervisor timer interrupt) on hart 
%x\r\n", mhartid);
                break;
        case 0x8000000000000006:
                log("main: interrupt (Reserved) on hart %x\r\n", mhartid);
                break;
        case 0x8000000000000007:
                log("main: interrupt (Machine timer interrupt) on hart %x\r\n", 
mhartid);
                clint_timer(&clint, mhartid, 0x1000000);
                break;
        case 0x8000000000000008:
                log("main: interrupt (User external interrupt) on hart %x\r\n", 
mhartid);
                break;
        case 0x8000000000000009:
                log("main: interrupt (Supervisor external interrupt) on hart 
%x\r\n", mhartid);
                break;
        case 0x800000000000000a:
                log("main: interrupt (Reserved) on hart %x\r\n", mhartid);
                break;
        case 0x800000000000000b:
                log("main: interrupt (Machine external interrupt) on hart 
%x\r\n", mhartid);
                main_plic_wake_up(mhartid);
                break;
        default:
                if(mcause < 0x8000000000000000) log("main: unknown exception 
(%x) on hart %x\r\n", mcause, mhartid);
                else log("main: unknown interrupt (%x) on hart %x\r\n", mcause 
& 0x7fffffffffffffff, mhartid);
                break;
        }

        while(mcause < 0x8000000000000000){} // TODO exception or interrupt not 
implemented, spin forever
}
</pre>

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https://bugs.launchpad.net/bugs/1859291

Title:
  RISC-V incorrect exception generated

Status in QEMU:
  New

Bug description:
  When using 'ecall' from supervisor mode, user exception is raised
  instead of supervisor exception. The problem is located under
  'target/riscv/insn_trans/trans_priviledged.inc.c' in function 'static
  bool trans_ecall(DisasContext *ctx, arg_ecall *a)'. Best regards,
  Serge Teodori

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