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[RFC PATCH 38/66] Hexagon TCG generation - step 01
From: |
Taylor Simpson |
Subject: |
[RFC PATCH 38/66] Hexagon TCG generation - step 01 |
Date: |
Mon, 10 Feb 2020 18:40:16 -0600 |
Include the generated files and set up the data structures
Signed-off-by: Taylor Simpson <address@hidden>
---
target/hexagon/genptr.c | 60 +++++++++++++++++++++++++++++++++++++++++++++++++
target/hexagon/genptr.h | 25 +++++++++++++++++++++
2 files changed, 85 insertions(+)
create mode 100644 target/hexagon/genptr.c
create mode 100644 target/hexagon/genptr.h
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
new file mode 100644
index 0000000..2a50be0
--- /dev/null
+++ b/target/hexagon/genptr.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2019 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <stdio.h>
+#define QEMU_GENERATE
+#include "qemu/osdep.h"
+#include "qemu/log.h"
+#include "cpu.h"
+#include "internal.h"
+#include "tcg/tcg-op.h"
+#include "insn.h"
+#include "opcodes.h"
+#include "translate.h"
+#include "macros.h"
+#include "genptr_helpers.h"
+
+#include "qemu_wrap_generated.h"
+
+#define DEF_QEMU(TAG, SHORTCODE, HELPER, GENFN, HELPFN) \
+static void generate_##TAG(CPUHexagonState *env, DisasContext *ctx, \
+ insn_t *insn) \
+{ \
+ GENFN \
+}
+#include "qemu_def_generated.h"
+#undef DEF_QEMU
+
+
+/* Fill in the table with NULLs because not all the opcodes have DEF_QEMU */
+semantic_insn_t opcode_genptr[] = {
+#define OPCODE(X) NULL
+#include "opcodes_def_generated.h"
+ NULL
+#undef OPCODE
+};
+
+/* This function overwrites the NULL entries where we have a DEF_QEMU */
+void init_genptr(void)
+{
+#define DEF_QEMU(TAG, SHORTCODE, HELPER, GENFN, HELPFN) \
+ opcode_genptr[TAG] = generate_##TAG;
+#include "qemu_def_generated.h"
+#undef DEF_QEMU
+}
+
+
diff --git a/target/hexagon/genptr.h b/target/hexagon/genptr.h
new file mode 100644
index 0000000..f178f72
--- /dev/null
+++ b/target/hexagon/genptr.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2019 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef GENPTR_H
+#define GENPTR_H
+
+#include "insn.h"
+
+extern semantic_insn_t opcode_genptr[];
+
+#endif
--
2.7.4
- [RFC PATCH 33/66] Hexagon TCG generation helpers - step 1, (continued)
- [RFC PATCH 33/66] Hexagon TCG generation helpers - step 1, Taylor Simpson, 2020/02/10
- [RFC PATCH 16/66] Hexagon arch import - macro definitions, Taylor Simpson, 2020/02/10
- [RFC PATCH 21/66] Hexagon generator phase 2 - qemu_def_generated.h, Taylor Simpson, 2020/02/10
- [RFC PATCH 35/66] Hexagon TCG generation helpers - step 3, Taylor Simpson, 2020/02/10
- [RFC PATCH 36/66] Hexagon TCG generation helpers - step 4, Taylor Simpson, 2020/02/10
- [RFC PATCH 19/66] Hexagon instruction utility functions, Taylor Simpson, 2020/02/10
- [RFC PATCH 30/66] Hexagon macros to interface with the generator, Taylor Simpson, 2020/02/10
- [RFC PATCH 32/66] Hexagon instruction classes, Taylor Simpson, 2020/02/10
- [RFC PATCH 31/66] Hexagon macros referenced in instruction semantics, Taylor Simpson, 2020/02/10
- [RFC PATCH 34/66] Hexagon TCG generation helpers - step 2, Taylor Simpson, 2020/02/10
- [RFC PATCH 38/66] Hexagon TCG generation - step 01,
Taylor Simpson <=
- [RFC PATCH 37/66] Hexagon TCG generation helpers - step 5, Taylor Simpson, 2020/02/10
- [RFC PATCH 39/66] Hexagon TCG generation - step 02, Taylor Simpson, 2020/02/10
- [RFC PATCH 40/66] Hexagon TCG generation - step 03, Taylor Simpson, 2020/02/10
- [RFC PATCH 41/66] Hexagon TCG generation - step 04, Taylor Simpson, 2020/02/10
- [RFC PATCH 46/66] Hexagon TCG generation - step 09, Taylor Simpson, 2020/02/10
- [RFC PATCH 43/66] Hexagon TCG generation - step 06, Taylor Simpson, 2020/02/10
- [RFC PATCH 15/66] Hexagon arch import - instruction semantics definitions, Taylor Simpson, 2020/02/10
- [RFC PATCH 42/66] Hexagon TCG generation - step 05, Taylor Simpson, 2020/02/10
- [RFC PATCH 47/66] Hexagon TCG generation - step 10, Taylor Simpson, 2020/02/10
- [RFC PATCH 44/66] Hexagon TCG generation - step 07, Taylor Simpson, 2020/02/10