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Re: [PATCH 2/2] util: add util function buffer_zero_avx512()
From: |
Robert Hoo |
Subject: |
Re: [PATCH 2/2] util: add util function buffer_zero_avx512() |
Date: |
Thu, 13 Feb 2020 19:58:16 +0800 |
On Thu, 2020-02-13 at 11:30 +0100, Paolo Bonzini wrote:
> On 13/02/20 08:52, Robert Hoo wrote:
> > +
> > +}
> > +#pragma GCC pop_options
> > +#endif
> > +
> > +
> > /* Note that for test_buffer_is_zero_next_accel, the most
> > preferred
> > * ISA must have the least significant bit.
> > */
> > -#define CACHE_AVX2 1
> > -#define CACHE_SSE4 2
> > -#define CACHE_SSE2 4
> > +#define CACHE_AVX512F 1
> > +#define CACHE_AVX2 2
> > +#define CACHE_SSE4 4
> > +#define CACHE_SSE2 6
>
> This should be 8, not 6.
>
> Paolo
Thanks Paolo, going to fix it in v2.
>
> >
> > /* Make sure that these variables are appropriately initialized
> > when
> > * SSE2 is enabled on the compiler command-line, but the compiler
> > is
> > @@ -226,6 +268,11 @@ static void init_accel(unsigned cache)
> > fn = buffer_zero_avx2;
> > }
> > #endif
> > +#ifdef CONFIG_AVX512F_OPT
> > + if (cache & CACHE_AVX512F) {
> > + fn = buffer_zero_avx512;
> > + }
> > +#endif
> > buffer_accel = fn;
> > }
> >
> > @@ -255,6 +302,9 @@ static void __attribute__((constructor))
> > init_cpuid_cache(void)
> > if ((bv & 6) == 6 && (b & bit_AVX2)) {
> > cache |= CACHE_AVX2;
> > }
> > + if ((bv & 6) == 6 && (b & bit_AVX512F)) {
> > + cache |= CACHE_AVX512F;
> > + }
> > }
>
>
Re: [PATCH 0/2] Add AVX512F optimization option and buffer_zero_avx512(), no-reply, 2020/02/13