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Re: [PATCH v4 03/20] target/arm: Add isar_feature tests for PAN + ATS1E1
From: |
Richard Henderson |
Subject: |
Re: [PATCH v4 03/20] target/arm: Add isar_feature tests for PAN + ATS1E1 |
Date: |
Fri, 14 Feb 2020 10:19:35 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 |
On 2/14/20 3:28 AM, Peter Maydell wrote:
>> +static inline bool isar_feature_aa32_pan(const ARMISARegisters *id)
>> +{
>> + return FIELD_EX64(id->mvfr0, ID_MMFR3, PAN) != 0;
>> +}
>> +
>> +static inline bool isar_feature_aa32_ats1e1(const ARMISARegisters *id)
>> +{
>> + return FIELD_EX64(id->mvfr0, ID_MMFR3, PAN) >= 2;
>> +}
>
> Didn't spot this before it hit master, but these feature
> test functions are looking at id->mvfr0, which is MVFR0, not
> MMFR3 !
>
> Also they're using FIELD_EX64 on a 32-bit register: is there
> a reason for that?
Nope, both mistakes. Will fix, if you haven't done so already.
r~
- [PATCH v4 00/20] target/arm: Implement PAN, ATS1E1, UAO, Richard Henderson, 2020/02/08
- [PATCH v4 01/20] target/arm: Add arm_mmu_idx_is_stage1_of_2, Richard Henderson, 2020/02/08
- [PATCH v4 03/20] target/arm: Add isar_feature tests for PAN + ATS1E1, Richard Henderson, 2020/02/08
- [PATCH v4 04/20] target/arm: Move LOR regdefs to file scope, Richard Henderson, 2020/02/08
- [PATCH v4 02/20] target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled, Richard Henderson, 2020/02/08
- [PATCH v4 05/20] target/arm: Split out aarch32_cpsr_valid_mask, Richard Henderson, 2020/02/08
- [PATCH v4 06/20] target/arm: Mask CPSR_J when Jazelle is not enabled, Richard Henderson, 2020/02/08
- [PATCH v4 08/20] target/arm: Use aarch32_cpsr_valid_mask in helper_exception_return, Richard Henderson, 2020/02/08
- [PATCH v4 07/20] target/arm: Replace CPSR_ERET_MASK with aarch32_cpsr_valid_mask, Richard Henderson, 2020/02/08
- [PATCH v4 09/20] target/arm: Remove CPSR_RESERVED, Richard Henderson, 2020/02/08