Re: [PATCH v5 15/22] target/arm: Clean address for DC ZVA

[Richard Henderson]

On 12/5/19 10:58 AM, Peter Maydell wrote:
> On Fri, 11 Oct 2019 at 14:50, Richard Henderson
> <address@hidden> wrote:
>>
>> This data access was forgotten in the previous patch.
>>
>> Fixes: 3a471103ac1823ba
>> Signed-off-by: Richard Henderson <address@hidden>
>> ---
>>  target/arm/translate-a64.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
>> index 4e049bb4aa..49817b96ae 100644
>> --- a/target/arm/translate-a64.c
>> +++ b/target/arm/translate-a64.c
>> @@ -1766,7 +1766,7 @@ static void handle_sys(DisasContext *s, uint32_t insn, 
>> bool isread,
>>          return;
>>      case ARM_CP_DC_ZVA:
>>          /* Writes clear the aligned block of memory which rt points into. */
>> -        tcg_rt = cpu_reg(s, rt);
>> +        tcg_rt = clean_data_tbi(s, cpu_reg(s, rt), false);
>>          gen_helper_dc_zva(cpu_env, tcg_rt);
>>          return;
> 
> ...doesn't this mean we don't do a tag check for DC ZVA?
> Or is that handled in the helper ? (I guess it has to be,
> the DC ZVA will span multiple tag granules).

It isn't clear to me that DC ZVA does check tags.  There's no pseudocode for
DC_ZVA, which is less helpful than it might be.

I suppose one could infer it from "behaves as a set of stores to each byte
within the block", but considering that stores are both checking or
non-checking depending on addressing mode etc, I'd have preferred an explicit 
note.

So far I'm treating DC_ZVA as unchecked.


r~