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[PATCH v5 00/18] target/ppc: Correct some errors with real mode handling
From: |
David Gibson |
Subject: |
[PATCH v5 00/18] target/ppc: Correct some errors with real mode handling |
Date: |
Thu, 20 Feb 2020 14:22:58 +1100 |
POWER "book S" (server class) cpus have a concept of "real mode" where
MMU translation is disabled... sort of. In fact this can mean a bunch
of slightly different things when hypervisor mode and other
considerations are present.
We had some errors in edge cases here, so clean some things up and
correct them.
Some of those limitations caused problems with calculating the size of
the Real Mode Area of pseries guests, so continue on to clean up and
correct those calculations as well.
Changes since v4:
* Some tiny cosmetic fixes to the original patches
* Added a bunch of extra patches correcting RMA calculation
Changes since v3:
* Fix style errors reported by checkpatch
Changes since v2:
* Removed 32-bit hypervisor stubs more completely
* Minor polish based on review comments
Changes since RFCv1:
* Add a number of extra patches taking advantage of the initial
cleanups
David Gibson (18):
ppc: Remove stub support for 32-bit hypervisor mode
ppc: Remove stub of PPC970 HID4 implementation
target/ppc: Correct handling of real mode accesses with vhyp on hash
MMU
target/ppc: Introduce ppc_hash64_use_vrma() helper
spapr, ppc: Remove VPM0/RMLS hacks for POWER9
target/ppc: Remove RMOR register from POWER9 & POWER10
target/ppc: Use class fields to simplify LPCR masking
target/ppc: Streamline calculation of RMA limit from LPCR[RMLS]
target/ppc: Correct RMLS table
target/ppc: Only calculate RMLS derived RMA limit on demand
target/ppc: Streamline construction of VRMA SLB entry
target/ppc: Don't store VRMA SLBE persistently
spapr: Don't use weird units for MIN_RMA_SLOF
spapr,ppc: Simplify signature of kvmppc_rma_size()
spapr: Don't attempt to clamp RMA to VRMA constraint
spapr: Don't clamp RMA to 16GiB on new machine types
spapr: Clean up RMA size calculation
spapr: Fold spapr_node0_size() into its only caller
hw/ppc/spapr.c | 124 ++++++------
hw/ppc/spapr_cpu_core.c | 6 +-
hw/ppc/spapr_hcall.c | 4 +-
include/hw/ppc/spapr.h | 4 +-
target/ppc/cpu-qom.h | 1 +
target/ppc/cpu.h | 25 +--
target/ppc/kvm.c | 5 +-
target/ppc/kvm_ppc.h | 7 +-
target/ppc/mmu-hash64.c | 327 ++++++++++++--------------------
target/ppc/translate_init.inc.c | 63 ++++--
10 files changed, 252 insertions(+), 314 deletions(-)
--
2.24.1
- [PATCH v5 00/18] target/ppc: Correct some errors with real mode handling,
David Gibson <=
- [PATCH v5 01/18] ppc: Remove stub support for 32-bit hypervisor mode, David Gibson, 2020/02/19
- [PATCH v5 05/18] spapr, ppc: Remove VPM0/RMLS hacks for POWER9, David Gibson, 2020/02/19
- [PATCH v5 04/18] target/ppc: Introduce ppc_hash64_use_vrma() helper, David Gibson, 2020/02/19
- [PATCH v5 07/18] target/ppc: Use class fields to simplify LPCR masking, David Gibson, 2020/02/19
- [PATCH v5 10/18] target/ppc: Only calculate RMLS derived RMA limit on demand, David Gibson, 2020/02/19
- [PATCH v5 08/18] target/ppc: Streamline calculation of RMA limit from LPCR[RMLS], David Gibson, 2020/02/19
- [PATCH v5 12/18] target/ppc: Don't store VRMA SLBE persistently, David Gibson, 2020/02/19
- [PATCH v5 09/18] target/ppc: Correct RMLS table, David Gibson, 2020/02/19
- [PATCH v5 02/18] ppc: Remove stub of PPC970 HID4 implementation, David Gibson, 2020/02/19
- [PATCH v5 14/18] spapr,ppc: Simplify signature of kvmppc_rma_size(), David Gibson, 2020/02/19