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[PULL 28/52] target/arm: Provide ARMv8.4-PMU in '-cpu max'
From: |
Peter Maydell |
Subject: |
[PULL 28/52] target/arm: Provide ARMv8.4-PMU in '-cpu max' |
Date: |
Fri, 21 Feb 2020 13:07:16 +0000 |
Set the ID register bits to provide ARMv8.4-PMU (and implicitly
also ARMv8.1-PMU) in the 'max' CPU.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
---
target/arm/cpu64.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index f8f74a7ecda..c9452894035 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -703,6 +703,14 @@ static void aarch64_max_initfn(Object *obj)
u = FIELD_DP32(u, ID_MMFR3, PAN, 2); /* ATS1E1 */
cpu->id_mmfr3 = u;
+ u = cpu->isar.id_aa64dfr0;
+ u = FIELD_DP64(u, ID_AA64DFR0, PMUVER, 5); /* v8.4-PMU */
+ cpu->isar.id_aa64dfr0 = u;
+
+ u = cpu->isar.id_dfr0;
+ u = FIELD_DP32(u, ID_DFR0, PERFMON, 5); /* v8.4-PMU */
+ cpu->isar.id_dfr0 = u;
+
/*
* FIXME: We do not yet support ARMv8.2-fp16 for AArch32 yet,
* so do not set MVFR1.FPHP. Strictly speaking this is not legal,
--
2.20.1
- [PULL 18/52] target/arm: Factor out PMU register definitions, (continued)
- [PULL 18/52] target/arm: Factor out PMU register definitions, Peter Maydell, 2020/02/21
- [PULL 21/52] target/arm: Define an aa32_pmu_8_1 isar feature test function, Peter Maydell, 2020/02/21
- [PULL 22/52] target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checks, Peter Maydell, 2020/02/21
- [PULL 19/52] target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1, Peter Maydell, 2020/02/21
- [PULL 23/52] target/arm: Stop assuming DBGDIDR always exists, Peter Maydell, 2020/02/21
- [PULL 24/52] target/arm: Move DBGDIDR into ARMISARegisters, Peter Maydell, 2020/02/21
- [PULL 26/52] target/arm: Implement ARMv8.1-PMU extension, Peter Maydell, 2020/02/21
- [PULL 25/52] target/arm: Read debug-related ID registers from KVM, Peter Maydell, 2020/02/21
- [PULL 27/52] target/arm: Implement ARMv8.4-PMU extension, Peter Maydell, 2020/02/21
- [PULL 29/52] target/arm: Correct definition of PMCRDP, Peter Maydell, 2020/02/21
- [PULL 28/52] target/arm: Provide ARMv8.4-PMU in '-cpu max',
Peter Maydell <=
- [PULL 30/52] target/arm: Correct handling of PMCR_EL0.LC bit, Peter Maydell, 2020/02/21
- [PULL 32/52] target/arm: Use isar_feature function for testing AA32HPD feature, Peter Maydell, 2020/02/21
- [PULL 33/52] target/arm: Use FIELD_EX32 for testing 32-bit fields, Peter Maydell, 2020/02/21
- [PULL 31/52] target/arm: Test correct register in aa32_pan and aa32_ats1e1 checks, Peter Maydell, 2020/02/21
- [PULL 34/52] target/arm: Correctly implement ACTLR2, HACTLR2, Peter Maydell, 2020/02/21
- [PULL 35/52] hw: usb: hcd-ohci: Move OHCISysBusState and TYPE_SYSBUS_OHCI to include file, Peter Maydell, 2020/02/21
- [PULL 37/52] arm: allwinner: Wire up USB ports, Peter Maydell, 2020/02/21
- [PULL 36/52] hcd-ehci: Introduce "companion-enable" sysbus property, Peter Maydell, 2020/02/21
- [PULL 39/52] target/arm: Convert PMUL.8 to gvec, Peter Maydell, 2020/02/21
- [PULL 42/52] xilinx_spips: Correct the number of dummy cycles for the FAST_READ_4 cmd, Peter Maydell, 2020/02/21