[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v2] riscv: sifive_u: Add a "serial" property for board serial
From: |
Bin Meng |
Subject: |
Re: [PATCH v2] riscv: sifive_u: Add a "serial" property for board serial number |
Date: |
Sun, 23 Feb 2020 11:59:34 +0800 |
On Sun, Feb 16, 2020 at 9:55 PM Bin Meng <address@hidden> wrote:
>
> At present the board serial number is hard-coded to 1, and passed
> to OTP model during initialization. Firmware (FSBL, U-Boot) uses
> the serial number to generate a unique MAC address for the on-chip
> ethernet controller. When multiple QEMU 'sifive_u' instances are
> created and connected to the same subnet, they all have the same
> MAC address hence it creates a unusable network.
>
> A new "serial" property is introduced to specify the board serial
> number. When not given, the default serial number 1 is used.
>
> Signed-off-by: Bin Meng <address@hidden>
>
> ---
>
> Changes in v2:
> - Move setting OTP serial number property from riscv_sifive_u_soc_init()
> to riscv_sifive_u_soc_realize(), to fix the 'check-qtest-riscv' error.
> I am not really sure why doing so could fix the 'make check' error.
> The v1 patch worked fine and nothing seems wrong.
>
> hw/riscv/sifive_u.c | 21 ++++++++++++++++++++-
> include/hw/riscv/sifive_u.h | 1 +
> 2 files changed, 21 insertions(+), 1 deletion(-)
>
Ping?
Regards,
Bin