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[PATCH v32 00/22] Add RX archtecture support
From: |
Yoshinori Sato |
Subject: |
[PATCH v32 00/22] Add RX archtecture support |
Date: |
Mon, 24 Feb 2020 23:19:01 +0900 |
Hello.
This patch series is added Renesas RX target emulation.
Changes for v31.
Squash minor changes.
Changes for v30.
Follow master changes.
Fix checkpatch error.
Changes for v29.
Add target description XML. It required gdb-9.1.
Follow git master changes.
Changes for v28.
Allow -m option.
With this option, 16 Mbytes or more can be specified.
Add example for qemu-doc.
Fix build error on latest master.
Changes for v27.
Added RX section to qemu-doc.
Rebase for master
Changes for v26.
Rebase for 5.0
Update machine.json for 5.0
Changes for v25.
Update commit message.
Squashed qapi/machine.json changes.
Changes for v24.
Add note for qapi/machine.json.
Added Acked-by for 6/22.
git rebase master.
Changes for v23.
Follow master changes.
Changes for v22.
Added some include.
Changes for v21.
rebase latest master.
Remove unneeded hmp_info_tlb.
Chanegs for v20.
Reorderd patches.
Squashed v19 changes.
Changes for v19.
Follow tcg changes.
Cleanup cpu.c.
simplify rx_cpu_class_by_name and rx_load_image move to rx-virt.
My git repository is bellow.
git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git tags/rx-20200224
Testing binaries bellow.
u-boot
Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bin.gz
starting
$ gzip -d u-boot.bin.gz
$ qemu-system-rx -bios u-boot.bin
linux and pico-root (only sash)
Download - https://osdn.net/users/ysato/pf/qemu/dl/zImage (kernel)
https://osdn.net/users/ysato/pf/qemu/dl/rx-virt.dtb (DeviceTree)
starting
$ qemu-system-rx -kernel zImage -dtb rx-virt.dtb -append "earlycon"
Philippe Mathieu-Daudé (3):
hw/registerfields.h: Add 8bit and 16bit register macros
hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core
BootLinuxConsoleTest: Test the RX-Virt machine
Richard Henderson (7):
target/rx: Disassemble rx_index_addr into a string
target/rx: Replace operand with prt_ldmi in disassembler
target/rx: Use prt_ldmi for XCHG_mr disassembly
target/rx: Emit all disassembly in one prt()
target/rx: Collect all bytes during disassembly
target/rx: Dump bytes for each insn during disassembly
hw/rx: Honor -accel qtest
Yoshinori Sato (12):
MAINTAINERS: Add RX
qemu/bitops.h: Add extract8 and extract16
target/rx: TCG translation
target/rx: TCG helper
target/rx: CPU definition
target/rx: RX disassembler
hw/intc: RX62N interrupt controller (ICUa)
hw/timer: RX62N internal timer modules
hw/char: RX62N serial communication interface (SCI)
hw/rx: RX Target hardware definition
Add rx-softmmu
qemu-doc.texi: Add RX section.
qemu-doc.texi | 44 +
configure | 11 +-
default-configs/rx-softmmu.mak | 3 +
qapi/machine.json | 2 +-
include/disas/dis-asm.h | 5 +
include/exec/poison.h | 1 +
include/hw/char/renesas_sci.h | 45 +
include/hw/intc/rx_icu.h | 56 +
include/hw/registerfields.h | 32 +-
include/hw/rx/rx.h | 7 +
include/hw/rx/rx62n.h | 91 +
include/hw/timer/renesas_cmt.h | 38 +
include/hw/timer/renesas_tmr.h | 53 +
include/qemu/bitops.h | 38 +
include/sysemu/arch_init.h | 1 +
target/rx/cpu-param.h | 31 +
target/rx/cpu-qom.h | 42 +
target/rx/cpu.h | 181 ++
target/rx/helper.h | 31 +
target/rx/insns.decode | 621 ++++++
arch_init.c | 2 +
hw/char/renesas_sci.c | 342 ++++
hw/intc/rx_icu.c | 379 ++++
hw/rx/rx-virt.c | 144 ++
hw/rx/rx62n.c | 247 +++
hw/timer/renesas_cmt.c | 278 +++
hw/timer/renesas_tmr.c | 458 +++++
target/rx/cpu.c | 218 +++
target/rx/disas.c | 1446 ++++++++++++++
target/rx/gdbstub.c | 112 ++
target/rx/helper.c | 149 ++
target/rx/op_helper.c | 470 +++++
target/rx/translate.c | 2432 ++++++++++++++++++++++++
tests/qtest/machine-none-test.c | 1 +
MAINTAINERS | 19 +
gdb-xml/rx-core.xml | 70 +
hw/Kconfig | 1 +
hw/char/Kconfig | 3 +
hw/char/Makefile.objs | 1 +
hw/intc/Kconfig | 3 +
hw/intc/Makefile.objs | 1 +
hw/rx/Kconfig | 14 +
hw/rx/Makefile.objs | 2 +
hw/timer/Kconfig | 6 +
hw/timer/Makefile.objs | 3 +
target/rx/Makefile.objs | 11 +
tests/acceptance/boot_linux_console.py | 46 +
47 files changed, 8188 insertions(+), 3 deletions(-)
create mode 100644 default-configs/rx-softmmu.mak
create mode 100644 include/hw/char/renesas_sci.h
create mode 100644 include/hw/intc/rx_icu.h
create mode 100644 include/hw/rx/rx.h
create mode 100644 include/hw/rx/rx62n.h
create mode 100644 include/hw/timer/renesas_cmt.h
create mode 100644 include/hw/timer/renesas_tmr.h
create mode 100644 target/rx/cpu-param.h
create mode 100644 target/rx/cpu-qom.h
create mode 100644 target/rx/cpu.h
create mode 100644 target/rx/helper.h
create mode 100644 target/rx/insns.decode
create mode 100644 hw/char/renesas_sci.c
create mode 100644 hw/intc/rx_icu.c
create mode 100644 hw/rx/rx-virt.c
create mode 100644 hw/rx/rx62n.c
create mode 100644 hw/timer/renesas_cmt.c
create mode 100644 hw/timer/renesas_tmr.c
create mode 100644 target/rx/cpu.c
create mode 100644 target/rx/disas.c
create mode 100644 target/rx/gdbstub.c
create mode 100644 target/rx/helper.c
create mode 100644 target/rx/op_helper.c
create mode 100644 target/rx/translate.c
create mode 100644 gdb-xml/rx-core.xml
create mode 100644 hw/rx/Kconfig
create mode 100644 hw/rx/Makefile.objs
create mode 100644 target/rx/Makefile.objs
--
2.20.1
- [PATCH v32 00/22] Add RX archtecture support,
Yoshinori Sato <=
- [PATCH v32 02/22] qemu/bitops.h: Add extract8 and extract16, Yoshinori Sato, 2020/02/24
- [PATCH v32 11/22] target/rx: Emit all disassembly in one prt(), Yoshinori Sato, 2020/02/24
- [PATCH v32 01/22] MAINTAINERS: Add RX, Yoshinori Sato, 2020/02/24
- [PATCH v32 03/22] hw/registerfields.h: Add 8bit and 16bit register macros, Yoshinori Sato, 2020/02/24
- [PATCH v32 12/22] target/rx: Collect all bytes during disassembly, Yoshinori Sato, 2020/02/24
- [PATCH v32 13/22] target/rx: Dump bytes for each insn during disassembly, Yoshinori Sato, 2020/02/24
- [PATCH v32 18/22] hw/rx: Honor -accel qtest, Yoshinori Sato, 2020/02/24
- [PATCH v32 19/22] hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core, Yoshinori Sato, 2020/02/24
- [PATCH v32 20/22] Add rx-softmmu, Yoshinori Sato, 2020/02/24