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Re: [PATCH v3 2/2] util: add util function buffer_zero_avx512()
From: |
Robert Hoo |
Subject: |
Re: [PATCH v3 2/2] util: add util function buffer_zero_avx512() |
Date: |
Sat, 29 Feb 2020 11:01:22 +0800 |
On Fri, 2020-02-28 at 18:09 -0800, Richard Henderson wrote:
> On 2/27/20 6:24 PM, Robert Hoo wrote:
> > if ((bv & 6) == 6 && (b & bit_AVX2)) {
> > cache |= CACHE_AVX2;
> > }
> > + if ((bv & 6) == 6 && (b & bit_AVX512F)) {
> > + cache |= CACHE_AVX512F;
> > + }
>
> Oh, one more thing I missed -- we have to ensure that the 512-bit
> registers are
> enabled. I believe the minimum is bits 6 and 7 enabled (ZMM_Hi256,
> Hi16_ZMM),
> since we don't know that the compiler won't allocate registers from
> zmm16-31.
>
> So: (bv & 0xc6) == 0xc6.
>
> You'd be right that some comments would be helpful on these
> lines. :-P
>
Oh, right, thank you very much for remind.
SDM's recommended detection on AVX512F support procedure is
1. Detect CPUID.1:ECX.OSXSAVE[bit 27] = 1 (XGETBV enabled for
application use).
2. Execute XGETBV and verify that XCR0[7:5] = 111b (OPMASK state, upper
256-bit of ZMM0-ZMM15 and ZMM16-ZMM31 state are enabled by OS) and that
XCR0[2:1] = 11b (XMM state and YMM state are enabled by OS).
3. Detect CPUID.0x7.0:EBX.AVX512F[bit 16] = 1.
I'm going to send v4 to address this.
> With that,
> Reviewed-by: Richard Henderson <address@hidden>
>
>
> r~