Re: [PATCH for-5.1] hw/arm/nrf51_soc: Set system_clock_scale

[Philippe Mathieu-Daudé]

On 7/27/20 9:34 PM, Peter Maydell wrote:
> The nrf51 SoC model wasn't setting the system_clock_scale
> global.which meant that if guest code used the systick timer in "use
> the processor clock" mode it would hang because time never advances.
> 
> Set the global to match the documented CPU clock speed for this SoC.
> 
> This SoC in fact doesn't have a SysTick timer (which is the only thing
> currently that cares about the system_clock_scale), because it's
> a configurable option in the Cortex-M0. However our Cortex-M0 and
> thus our nrf51 and our micro:bit board do provide a SysTick, so
> we ought to provide a functional one rather than a broken one.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> Tested with 'make check'/'make check-acceptance' only.
> 
>  hw/arm/nrf51_soc.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
> index 45e6cc97d70..e15981e019f 100644
> --- a/hw/arm/nrf51_soc.c
> +++ b/hw/arm/nrf51_soc.c
> @@ -32,6 +32,9 @@
>  
>  #define BASE_TO_IRQ(base) ((base >> 12) & 0x1F)
>  
> +/* HCLK (the main CPU clock) on this SoC is always 16MHz */
> +#define HCLK_FRQ 16000000
> +
>  static uint64_t clock_read(void *opaque, hwaddr addr, unsigned int size)
>  {
>      qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " [%u]\n",
> @@ -65,6 +68,8 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error 
> **errp)
>          return;
>      }
>  
> +    system_clock_scale = NANOSECONDS_PER_SECOND / HCLK_FRQ;

So nice when the datasheet is available, and even listed at the top of
the file!

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> +
>      object_property_set_link(OBJECT(&s->cpu), "memory", 
> OBJECT(&s->container),
>                               &error_abort);
>      if (!sysbus_realize(SYS_BUS_DEVICE(&s->cpu), errp)) {
>