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[PATCH v1 03/21] target/arm: add BQL to do_interrupt and cpu_exec_interr
From: |
Robert Foley |
Subject: |
[PATCH v1 03/21] target/arm: add BQL to do_interrupt and cpu_exec_interrupt |
Date: |
Wed, 5 Aug 2020 14:12:45 -0400 |
This is part of a series of changes to remove the implied BQL
from the common code of cpu_handle_interrupt and
cpu_handle_exception. As part of removing the implied BQL
from the common code, we are pushing the BQL holding
down into the per-arch implementation functions of
do_interrupt and cpu_exec_interrupt.
The purpose of this set of changes is to set the groundwork
so that an arch could move towards removing
the BQL from the cpu_handle_interrupt/exception paths.
This approach was suggested by Paolo Bonzini.
For reference, here are two key posts in the discussion, explaining
the reasoning/benefits of this approach.
https://lists.gnu.org/archive/html/qemu-devel/2020-07/msg08731.html
https://lists.gnu.org/archive/html/qemu-devel/2020-08/msg00044.html
Signed-off-by: Robert Foley <robert.foley@linaro.org>
---
target/arm/cpu.c | 13 ++++++++++---
target/arm/helper.c | 17 ++++++++++++++++-
2 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 401832ea95..b8544f0f0a 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -528,12 +528,17 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int
interrupt_request)
{
CPUClass *cc = CPU_GET_CLASS(cs);
CPUARMState *env = cs->env_ptr;
- uint32_t cur_el = arm_current_el(env);
- bool secure = arm_is_secure(env);
- uint64_t hcr_el2 = arm_hcr_el2_eff(env);
+ uint32_t cur_el;
+ bool secure;
+ uint64_t hcr_el2;
uint32_t target_el;
uint32_t excp_idx;
+ qemu_mutex_lock_iothread();
+ cur_el = arm_current_el(env);
+ secure = arm_is_secure(env);
+ hcr_el2 = arm_hcr_el2_eff(env);
+
/* The prioritization of interrupts is IMPLEMENTATION DEFINED. */
if (interrupt_request & CPU_INTERRUPT_FIQ) {
@@ -568,12 +573,14 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int
interrupt_request)
goto found;
}
}
+ qemu_mutex_unlock_iothread();
return false;
found:
cs->exception_index = excp_idx;
env->exception.target_el = target_el;
cc->do_interrupt(cs);
+ qemu_mutex_unlock_iothread();
return true;
}
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c5ea2c25ea..3a22d40598 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9759,7 +9759,13 @@ void arm_cpu_do_interrupt(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
- unsigned int new_el = env->exception.target_el;
+ unsigned int new_el;
+
+ bool bql = !qemu_mutex_iothread_locked();
+ if (bql) {
+ qemu_mutex_lock_iothread();
+ }
+ new_el = env->exception.target_el;
assert(!arm_feature(env, ARM_FEATURE_M));
@@ -9776,6 +9782,9 @@ void arm_cpu_do_interrupt(CPUState *cs)
if (arm_is_psci_call(cpu, cs->exception_index)) {
arm_handle_psci_call(cpu);
qemu_log_mask(CPU_LOG_INT, "...handled as PSCI call\n");
+ if (bql) {
+ qemu_mutex_unlock_iothread();
+ }
return;
}
@@ -9787,6 +9796,9 @@ void arm_cpu_do_interrupt(CPUState *cs)
#ifdef CONFIG_TCG
if (cs->exception_index == EXCP_SEMIHOST) {
handle_semihosting(cs);
+ if (bql) {
+ qemu_mutex_unlock_iothread();
+ }
return;
}
#endif
@@ -9808,6 +9820,9 @@ void arm_cpu_do_interrupt(CPUState *cs)
if (!kvm_enabled()) {
cpu_interrupt_request_or(cs, CPU_INTERRUPT_EXITTB);
}
+ if (bql) {
+ qemu_mutex_unlock_iothread();
+ }
}
#endif /* !CONFIG_USER_ONLY */
--
2.17.1
- Re: [PATCH v1 01/21] accel/tcg: Change interrupt/exception handling to remove implied BQL, (continued)
- Re: [PATCH v1 01/21] accel/tcg: Change interrupt/exception handling to remove implied BQL, Paolo Bonzini, 2020/08/06
- Re: [PATCH v1 01/21] accel/tcg: Change interrupt/exception handling to remove implied BQL, Robert Foley, 2020/08/06
- Re: [PATCH v1 01/21] accel/tcg: Change interrupt/exception handling to remove implied BQL, Paolo Bonzini, 2020/08/06
- Re: [PATCH v1 01/21] accel/tcg: Change interrupt/exception handling to remove implied BQL, Robert Foley, 2020/08/06
- Re: [PATCH v1 01/21] accel/tcg: Change interrupt/exception handling to remove implied BQL, Robert Foley, 2020/08/07
- Re: [PATCH v1 01/21] accel/tcg: Change interrupt/exception handling to remove implied BQL, Paolo Bonzini, 2020/08/08
- Re: [PATCH v1 01/21] accel/tcg: Change interrupt/exception handling to remove implied BQL, Robert Foley, 2020/08/10
[PATCH v1 02/21] target/alpha: add BQL to do_interrupt and cpu_exec_interrupt, Robert Foley, 2020/08/05
[PATCH v1 03/21] target/arm: add BQL to do_interrupt and cpu_exec_interrupt,
Robert Foley <=
[PATCH v1 04/21] target/avr: add BQL to do_interrupt and cpu_exec_interrupt, Robert Foley, 2020/08/05
[PATCH v1 05/21] target/cris: add BQL to do_interrupt and cpu_exec_interrupt, Robert Foley, 2020/08/05
[PATCH v1 06/21] target/hppa: add BQL to do_interrupt and cpu_exec_interrupt, Robert Foley, 2020/08/05
[PATCH v1 07/21] target/i386: add BQL to do_interrupt and cpu_exec_interrupt, Robert Foley, 2020/08/05
[PATCH v1 08/21] target/lm32: add BQL to do_interrupt and cpu_exec_interrupt, Robert Foley, 2020/08/05
[PATCH v1 09/21] target/m68k: add BQL to do_interrupt and cpu_exec_interrupt, Robert Foley, 2020/08/05
[PATCH v1 10/21] target/microblaze: add BQL to do_interrupt and cpu_exec_interrupt, Robert Foley, 2020/08/05
[PATCH v1 11/21] target/mips: add BQL to do_interrupt and cpu_exec_interrupt, Robert Foley, 2020/08/05