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[PATCH for-5.2 09/19] ftgmac100: Fix registers that can be read
From: |
Cédric Le Goater |
Subject: |
[PATCH for-5.2 09/19] ftgmac100: Fix registers that can be read |
Date: |
Thu, 6 Aug 2020 15:20:56 +0200 |
Receive Ring Base Address Register (RXR_BADR) and the Normal Priority
Transmit Receive Ring Base Address Register (NPTXR_BADR) can als be
read.
Cc: Frederic Konrad <konrad.frederic@yahoo.fr>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/net/ftgmac100.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c
index 5f4b26fc5f3c..0348fcf45676 100644
--- a/hw/net/ftgmac100.c
+++ b/hw/net/ftgmac100.c
@@ -669,6 +669,10 @@ static uint64_t ftgmac100_read(void *opaque, hwaddr addr,
unsigned size)
return s->math[0];
case FTGMAC100_MATH1:
return s->math[1];
+ case FTGMAC100_RXR_BADR:
+ return s->rx_ring;
+ case FTGMAC100_NPTXR_BADR:
+ return s->tx_ring;
case FTGMAC100_ITC:
return s->itc;
case FTGMAC100_DBLAC:
--
2.25.4
- Re: [PATCH for-5.2 12/19] ftgmac100: Change interrupt status when a DMA error occurs, (continued)
- [PATCH for-5.2 16/19] aspeed/sdmc: Perform memory training, Cédric Le Goater, 2020/08/06
- [PATCH for-5.2 07/19] aspeed/smc: Fix max_slaves of the legacy SMC device, Cédric Le Goater, 2020/08/06
- [PATCH for-5.2 10/19] ftgmac100: Fix interrupt status "Packet transmitted on ethernet", Cédric Le Goater, 2020/08/06
- [PATCH for-5.2 09/19] ftgmac100: Fix registers that can be read,
Cédric Le Goater <=
- [PATCH for-5.2 19/19] aspeed/smc: Open AHB window of the second chip of the AST2600 FMC controller, Cédric Le Goater, 2020/08/06
- [PATCH for-5.2 17/19] aspeed/sdmc: Allow writes to unprotected registers, Cédric Le Goater, 2020/08/06
- [PATCH for-5.2 13/19] ftgmac100: Check for invalid len and address before doing a DMA transfer, Cédric Le Goater, 2020/08/06
- [PATCH for-5.2 14/19] ftgmac100: Fix integer overflow in ftgmac100_do_tx(), Cédric Le Goater, 2020/08/06