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Re: [RFC v3 16/71] target/riscv: add fp16 nan-box check generator functi
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From: |
Richard Henderson |
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Subject: |
Re: [RFC v3 16/71] target/riscv: add fp16 nan-box check generator function |
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Date: |
Thu, 6 Aug 2020 15:57:29 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 8/6/20 3:46 AM, frank.chang@sifive.com wrote:
> From: Frank Chang <frank.chang@sifive.com>
>
> If a 16-bit input is not properly nanboxed, then the input is replaced
> with the default qnan.
>
> Signed-off-by: Frank Chang <frank.chang@sifive.com>
> ---
> target/riscv/translate.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
The code is perfectly fine, but the patch has to be merged with the first user
of gen_check_nanbox_h. Otherwise a bisection that stops at this patch will
Werror for the unused function.
r~
- Re: [RFC v3 10/71] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers, (continued)
- [RFC v3 11/71] target/riscv: rvv-1.0: remove MLEN calculations, frank . chang, 2020/08/06
- [RFC v3 12/71] target/riscv: rvv-1.0: add fractional LMUL, frank . chang, 2020/08/06
- [RFC v3 13/71] target/riscv: rvv-1.0: add VMA and VTA, frank . chang, 2020/08/06
- [RFC v3 15/71] target/riscv: introduce more imm value modes in translator functions, frank . chang, 2020/08/06
- [RFC v3 16/71] target/riscv: add fp16 nan-box check generator function, frank . chang, 2020/08/06
- Re: [RFC v3 16/71] target/riscv: add fp16 nan-box check generator function,
Richard Henderson <=
- [RFC v3 14/71] target/riscv: rvv-1.0: update check functions, frank . chang, 2020/08/06
- [RFC v3 17/71] target/riscv: rvv:1.0: add translation-time nan-box helper function, frank . chang, 2020/08/06
- [RFC v3 19/71] target/riscv: rvv-1.0: configure instructions, frank . chang, 2020/08/06
- [RFC v3 18/71] target/riscv: rvv-1.0: apply nanbox helper in opfvf_trans, frank . chang, 2020/08/06
- [RFC v3 20/71] target/riscv: rvv-1.0: stride load and store instructions, frank . chang, 2020/08/06
- [RFC v3 22/71] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns, frank . chang, 2020/08/06
- [RFC v3 21/71] target/riscv: rvv-1.0: index load and store instructions, frank . chang, 2020/08/06