[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH] riscv: Fix bug in setting pmpcfg CSR for RISCV64
From: |
Alistair Francis |
Subject: |
Re: [PATCH] riscv: Fix bug in setting pmpcfg CSR for RISCV64 |
Date: |
Mon, 10 Aug 2020 15:32:25 -0700 |
On Sat, Aug 8, 2020 at 6:05 AM Hou Weiying <weiying_hou@outlook.com> wrote:
>
> First, sizeof(target_ulong) equals to 4 on riscv32, so this change
> does not change the function on riscv32. Second, sizeof(target_ulong)
> equals to 8 on riscv64, and 'reg_index * 8 + i' is not a legal
> pmp_index (we will explain later), which should be 'reg_index * 4 + i'.
>
> If the parameter reg_index equals to 2 (means that we will change the
> value of pmpcfg2, or the second pmpcfg on riscv64), then
> pmpcfg_csr_write(env, 2, val) will map write tasks to
> pmp_write_cfg(env, 2 * 8 + [0...7], val). However, no cfg csr is indexed
> by value 16 or 23 on riscv64, so we consider it as a bug.
>
> We are looking for constant (e.g., define a new constant named
> RISCV_WORD_SIZE) in QEMU to help others understand code better,
> but none was found. A possible good explanation of this literal is it is
> the minimum word length on riscv is 4 bytes (32 bit).
>
> Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com>
> Signed-off-by: Hou Weiying <weiying_hou@outlook.com>
> Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/pmp.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
> index 2a2b9f5363..b14feeb7da 100644
> --- a/target/riscv/pmp.c
> +++ b/target/riscv/pmp.c
> @@ -320,8 +320,7 @@ void pmpcfg_csr_write(CPURISCVState *env, uint32_t
> reg_index,
>
> for (i = 0; i < sizeof(target_ulong); i++) {
> cfg_val = (val >> 8 * i) & 0xff;
> - pmp_write_cfg(env, (reg_index * sizeof(target_ulong)) + i,
> - cfg_val);
> + pmp_write_cfg(env, (reg_index * 4) + i, cfg_val);
> }
> }
>
> @@ -336,7 +335,7 @@ target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t
> reg_index)
> target_ulong val = 0;
>
> for (i = 0; i < sizeof(target_ulong); i++) {
> - val = pmp_read_cfg(env, (reg_index * sizeof(target_ulong)) + i);
> + val = pmp_read_cfg(env, (reg_index * 4) + i);
> cfg_val |= (val << (i * 8));
> }
> trace_pmpcfg_csr_read(env->mhartid, reg_index, cfg_val);
> --
> 2.20.1
>
>