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Re: [PATCH] target/arm: Clarify HCR_EL2 ARMCPRegInfo type
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From: |
Edgar E. Iglesias |
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Subject: |
Re: [PATCH] target/arm: Clarify HCR_EL2 ARMCPRegInfo type |
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Date: |
Thu, 13 Aug 2020 14:26:12 +0200 |
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User-agent: |
Mutt/1.10.1 (2018-07-13) |
On Wed, Aug 12, 2020 at 01:12:23PM +0200, Philippe Mathieu-Daudé wrote:
> In commit ce4afed839 ("target/arm: Implement AArch32 HCR and HCR2")
> the HCR_EL2 register has been changed from type NO_RAW (no underlying
> state and does not support raw access for state saving/loading) to
> type CONST (TCG can assume the value to be constant), removing the
> read/write accessors.
> We forgot to remove the previous type ARM_CP_NO_RAW. This is not
> really a problem since the field is overwritten. However it makes
> code review confuse, so remove it.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
> target/arm/helper.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 455c92b891..9aeb8ebfa9 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -5105,7 +5105,6 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = {
> .access = PL2_RW,
> .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore },
> { .name = "HCR_EL2", .state = ARM_CP_STATE_BOTH,
> - .type = ARM_CP_NO_RAW,
> .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 0,
> .access = PL2_RW,
> .type = ARM_CP_CONST, .resetvalue = 0 },
> --
> 2.21.3
>