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Re: [RFC 5/9] target/arm: introduce CPU feature dependency mechanism
From: |
Andrew Jones |
Subject: |
Re: [RFC 5/9] target/arm: introduce CPU feature dependency mechanism |
Date: |
Thu, 13 Aug 2020 14:48:21 +0200 |
On Thu, Aug 13, 2020 at 06:26:53PM +0800, Peng Liang wrote:
> Some CPU features are dependent on other CPU features. For example,
> ID_AA64PFR0_EL1.FP field and ID_AA64PFR0_EL1.AdvSIMD must have the same
> value, which means FP and ADVSIMD are dependent on each other, FPHP and
> ADVSIMDHP are dependent on each other.
>
> This commit introduces a mechanism for CPU feature dependency in
> AArch64. We build a directed graph from the CPU feature dependency
> relationship, each edge from->to means the `to` CPU feature is dependent
> on the `from` CPU feature. And we will automatically enable/disable CPU
> feature according to the directed graph.
>
> For example, a, b, and c CPU features are in relationship a->b->c, which
> means c is dependent on b and b is dependent on a. If c is enabled by
> user, then a and b is enabled automatically. And if a is disabled by
> user, then b and c is disabled automatically.
And what if a is mutually exclusive with b? I.e. a and b can both be
disabled, but only a or b may be enabled.
Thanks,
drew
[RFC 6/9] target/arm: introduce KVM_CAP_ARM_CPU_FEATURE, Peng Liang, 2020/08/13
[RFC 1/9] target/arm: convert isar regs to array, Peng Liang, 2020/08/13
[RFC 7/9] target/arm: Add CPU features to query-cpu-model-expansion, Peng Liang, 2020/08/13