Re: [PATCH 2/2] target/mips: Add definition of Loongson-3A3000 CPU

[Kaige Li]

On 08/13/2020 06:37 PM, Jiaxun Yang wrote:

> 在 2020/8/13 下午5:41, Kaige Li 写道:
> > Add definition of the Loongson-3A3000 processor in QEMU.
>
> Hi Kaige,
>
> We're not defining Loongson-3A3000 in QEMU because we have
> some features like Loongson-EXT2, VTLB not available currently, I'd
> prefer define it after we add these features to TCG.
>
> Loongson-3A4000's define is a exception to support KVM.
Ok, I see. This will be defined later, right?
Thanks.
Kaige.
> Thanks.
>
> - Jiaxun
>
> > Signed-off-by: Kaige Li <likaige@loongson.cn>
> > ---
> >   target/mips/translate_init.inc.c | 24 ++++++++++++++++++++++++
> >   1 file changed, 24 insertions(+)
> >
> > diff --git a/target/mips/translate_init.inc.c 
> > b/target/mips/translate_init.inc.c
> > index 0740819..2e98aff 100644
> > --- a/target/mips/translate_init.inc.c
> > +++ b/target/mips/translate_init.inc.c
> > @@ -829,6 +829,30 @@ const mips_def_t mips_defs[] = {
> >           .PABITS = 48,
> >           .insn_flags = CPU_LOONGSON3A,
> >           .mmu_type = MMU_TYPE_R4000,
> > +   },
> > +   {
> > +        .name = "Loongson-3A3000",
> > +        .CP0_PRid = 0x14630d,
> > +        /* 64KB I-cache and d-cache. 4 way with 32 bit cache line 
> > size.  */
> > +        .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) | (0x2 << 
> > CP0C0_AT) |
> > +                       (MMU_TYPE_R4000 << CP0C0_MT),
> > +        .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (63 << 
> > CP0C1_MMU) |
> > +                       (2 << CP0C1_IS) | (5 << CP0C1_IL) | (3 << 
> > CP0C1_IA) |
> > +                       (2 << CP0C1_DS) | (5 << CP0C1_DL) | (3 << 
> > CP0C1_DA) |
> > +                       (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << 
> > CP0C1_EP),
> > +        .CP0_Config2 = MIPS_CONFIG2 | (5 << CP0C2_SS) | (5 << 
> > CP0C2_SL) |
> > +                       (15 << CP0C2_SA),
> > +        .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_LPA),
> > +        .SYNCI_Step = 16,
> > +        .CCRes = 2,
> > +        .CP0_Status_rw_bitmask = 0x7DDBFFFF,
> > +        .CP1_fcr0 = (0x5 << FCR0_PRID) | (0x1 << FCR0_REV) | (0x1 << 
> > FCR0_F64),
> > +        .CP1_fcr31 = 0,
> > +        .CP1_fcr31_rw_bitmask = 0xFF83FFFF,
> > +        .SEGBITS = 48,
> > +        .PABITS = 48,
> > +        .insn_flags = CPU_LOONGSON3A,
> > +        .mmu_type = MMU_TYPE_R4000,
> >       },
> >       {
> >           .name = "Loongson-3A4000",