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[RFC v4 55/70] target/riscv: rvv-1.0: single-width floating-point reduct
From: |
frank . chang |
Subject: |
[RFC v4 55/70] target/riscv: rvv-1.0: single-width floating-point reduction |
Date: |
Mon, 17 Aug 2020 16:49:40 +0800 |
From: Frank Chang <frank.chang@sifive.com>
Signed-off-by: Frank Chang <frank.chang@sifive.com>
---
target/riscv/vector_helper.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 15a646af361..00743cbce34 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -4432,14 +4432,14 @@ GEN_VEXT_FRED(vfredsum_vs_w, uint32_t, uint32_t, H4,
H4, float32_add)
GEN_VEXT_FRED(vfredsum_vs_d, uint64_t, uint64_t, H8, H8, float64_add)
/* Maximum value */
-GEN_VEXT_FRED(vfredmax_vs_h, uint16_t, uint16_t, H2, H2, float16_maxnum)
-GEN_VEXT_FRED(vfredmax_vs_w, uint32_t, uint32_t, H4, H4, float32_maxnum)
-GEN_VEXT_FRED(vfredmax_vs_d, uint64_t, uint64_t, H8, H8, float64_maxnum)
+GEN_VEXT_FRED(vfredmax_vs_h, uint16_t, uint16_t, H2, H2, float16_maxnum_noprop)
+GEN_VEXT_FRED(vfredmax_vs_w, uint32_t, uint32_t, H4, H4, float32_maxnum_noprop)
+GEN_VEXT_FRED(vfredmax_vs_d, uint64_t, uint64_t, H8, H8, float64_maxnum_noprop)
/* Minimum value */
-GEN_VEXT_FRED(vfredmin_vs_h, uint16_t, uint16_t, H2, H2, float16_minnum)
-GEN_VEXT_FRED(vfredmin_vs_w, uint32_t, uint32_t, H4, H4, float32_minnum)
-GEN_VEXT_FRED(vfredmin_vs_d, uint64_t, uint64_t, H8, H8, float64_minnum)
+GEN_VEXT_FRED(vfredmin_vs_h, uint16_t, uint16_t, H2, H2, float16_minnum_noprop)
+GEN_VEXT_FRED(vfredmin_vs_w, uint32_t, uint32_t, H4, H4, float32_minnum_noprop)
+GEN_VEXT_FRED(vfredmin_vs_d, uint64_t, uint64_t, H8, H8, float64_minnum_noprop)
/* Vector Widening Floating-Point Reduction Instructions */
/* Unordered reduce 2*SEW = 2*SEW + sum(promote(SEW)) */
--
2.17.1
- [RFC v4 49/70] target/riscv: use softfloat lib float16 comparison functions, (continued)
- [RFC v4 49/70] target/riscv: use softfloat lib float16 comparison functions, frank . chang, 2020/08/17
- [RFC v4 50/70] target/riscv: rvv-1.0: floating-point compare instructions, frank . chang, 2020/08/17
- [RFC v4 51/70] target/riscv: rvv-1.0: mask-register logical instructions, frank . chang, 2020/08/17
- [RFC v4 52/70] target/riscv: rvv-1.0: slide instructions, frank . chang, 2020/08/17
- [RFC v4 53/70] target/riscv: rvv-1.0: floating-point slide instructions, frank . chang, 2020/08/17
- [RFC v4 54/70] target/riscv: rvv-1.0: narrowing fixed-point clip instructions, frank . chang, 2020/08/17
- [RFC v4 55/70] target/riscv: rvv-1.0: single-width floating-point reduction,
frank . chang <=
- [RFC v4 56/70] target/riscv: rvv-1.0: widening floating-point reduction instructions, frank . chang, 2020/08/17
- [RFC v4 59/70] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf, frank . chang, 2020/08/17
- [RFC v4 57/70] target/riscv: rvv-1.0: single-width scaling shift instructions, frank . chang, 2020/08/17
- [RFC v4 58/70] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add, frank . chang, 2020/08/17
- [RFC v4 60/70] target/riscv: rvv-1.0: remove integer extract instruction, frank . chang, 2020/08/17