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[PATCH v5 14/43] tcg: Make DisasContextBase.tb const
From: |
Richard Henderson |
Subject: |
[PATCH v5 14/43] tcg: Make DisasContextBase.tb const |
Date: |
Tue, 5 Jan 2021 07:19:21 -1000 |
There is nothing within the translators that ought to be
changing the TranslationBlock data, so make it const.
This does not actually use the read-only copy of the
data structure that exists within the rx region.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/gen-icount.h | 4 ++--
include/exec/translator.h | 2 +-
include/tcg/tcg-op.h | 2 +-
accel/tcg/translator.c | 4 ++--
target/arm/translate-a64.c | 2 +-
tcg/tcg-op.c | 2 +-
6 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index 822c43cfd3..aa4b44354a 100644
--- a/include/exec/gen-icount.h
+++ b/include/exec/gen-icount.h
@@ -32,7 +32,7 @@ static inline void gen_io_end(void)
tcg_temp_free_i32(tmp);
}
-static inline void gen_tb_start(TranslationBlock *tb)
+static inline void gen_tb_start(const TranslationBlock *tb)
{
TCGv_i32 count, imm;
@@ -71,7 +71,7 @@ static inline void gen_tb_start(TranslationBlock *tb)
tcg_temp_free_i32(count);
}
-static inline void gen_tb_end(TranslationBlock *tb, int num_insns)
+static inline void gen_tb_end(const TranslationBlock *tb, int num_insns)
{
if (tb_cflags(tb) & CF_USE_ICOUNT) {
/* Update the num_insn immediate parameter now that we know
diff --git a/include/exec/translator.h b/include/exec/translator.h
index 638e1529c5..24232ead41 100644
--- a/include/exec/translator.h
+++ b/include/exec/translator.h
@@ -67,7 +67,7 @@ typedef enum DisasJumpType {
* Architecture-agnostic disassembly context.
*/
typedef struct DisasContextBase {
- TranslationBlock *tb;
+ const TranslationBlock *tb;
target_ulong pc_first;
target_ulong pc_next;
DisasJumpType is_jmp;
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
index 5b3bdacc39..901b19f32a 100644
--- a/include/tcg/tcg-op.h
+++ b/include/tcg/tcg-op.h
@@ -805,7 +805,7 @@ static inline void tcg_gen_insn_start(target_ulong pc,
target_ulong a1,
* be NULL and @idx should be 0. Otherwise, @tb should be valid and
* @idx should be one of the TB_EXIT_ values.
*/
-void tcg_gen_exit_tb(TranslationBlock *tb, unsigned idx);
+void tcg_gen_exit_tb(const TranslationBlock *tb, unsigned idx);
/**
* tcg_gen_goto_tb() - output goto_tb TCG operation
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
index fb1e19c585..a49a794065 100644
--- a/accel/tcg/translator.c
+++ b/accel/tcg/translator.c
@@ -133,8 +133,8 @@ void translator_loop(const TranslatorOps *ops,
DisasContextBase *db,
}
/* The disas_log hook may use these values rather than recompute. */
- db->tb->size = db->pc_next - db->pc_first;
- db->tb->icount = db->num_insns;
+ tb->size = db->pc_next - db->pc_first;
+ tb->icount = db->num_insns;
#ifdef DEBUG_DISAS
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 2e3fdfdf6b..ef63edfc68 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -410,7 +410,7 @@ static inline bool use_goto_tb(DisasContext *s, int n,
uint64_t dest)
static inline void gen_goto_tb(DisasContext *s, int n, uint64_t dest)
{
- TranslationBlock *tb;
+ const TranslationBlock *tb;
tb = s->base.tb;
if (use_goto_tb(s, n, dest)) {
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index af7ce91ffa..19fa8e4691 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -2664,7 +2664,7 @@ void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi,
TCGv_i64 arg)
/* QEMU specific operations. */
-void tcg_gen_exit_tb(TranslationBlock *tb, unsigned idx)
+void tcg_gen_exit_tb(const TranslationBlock *tb, unsigned idx)
{
uintptr_t val = (uintptr_t)tb + idx;
--
2.25.1
- [PATCH v5 00/43] Mirror map JIT memory for TCG, Richard Henderson, 2021/01/05
- [PATCH v5 01/43] tcg: Do not flush icache for interpreter, Richard Henderson, 2021/01/05
- [PATCH v5 03/43] util: Enhance flush_icache_range with separate data pointer, Richard Henderson, 2021/01/05
- [PATCH v5 02/43] util: Extract flush_icache_range to cacheflush.c, Richard Henderson, 2021/01/05
- [PATCH v5 05/43] tcg: Move tcg prologue pointer out of TCGContext, Richard Henderson, 2021/01/05
- [PATCH v5 04/43] util: Specialize flush_idcache_range for aarch64, Richard Henderson, 2021/01/05
- [PATCH v5 07/43] tcg: Add in_code_gen_buffer, Richard Henderson, 2021/01/05
- [PATCH v5 06/43] tcg: Move tcg epilogue pointer out of TCGContext, Richard Henderson, 2021/01/05
- [PATCH v5 09/43] tcg: Adjust TCGLabel for const, Richard Henderson, 2021/01/05
- [PATCH v5 11/43] tcg: Adjust tcg_out_label for const, Richard Henderson, 2021/01/05
- [PATCH v5 14/43] tcg: Make DisasContextBase.tb const,
Richard Henderson <=
- [PATCH v5 13/43] tcg: Adjust tb_target_set_jmp_target for split-wx, Richard Henderson, 2021/01/05
- [PATCH v5 21/43] tcg/i386: Support split-wx code generation, Richard Henderson, 2021/01/05
- [PATCH v5 12/43] tcg: Adjust tcg_register_jit for const, Richard Henderson, 2021/01/05
- [PATCH v5 15/43] tcg: Make tb arg to synchronize_from_tb const, Richard Henderson, 2021/01/05
- [PATCH v5 20/43] tcg: Return the TB pointer from the rx region from exit_tb, Richard Henderson, 2021/01/05
- [PATCH v5 08/43] tcg: Introduce tcg_splitwx_to_{rx,rw}, Richard Henderson, 2021/01/05
- [PATCH v5 10/43] tcg: Adjust tcg_out_call for const, Richard Henderson, 2021/01/05
- [PATCH v5 16/43] tcg: Use Error with alloc_code_gen_buffer, Richard Henderson, 2021/01/05
- [PATCH v5 17/43] tcg: Add --accel tcg,split-wx property, Richard Henderson, 2021/01/05