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[PULL 25/66] target/mips: Fix code style for checkpatch.pl
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 25/66] target/mips: Fix code style for checkpatch.pl |
Date: |
Thu, 7 Jan 2021 23:22:12 +0100 |
We are going to move this code, fix its style first.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-14-f4bug@amsat.org>
---
target/mips/translate_init.c.inc | 36 ++++++++++++++++----------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/target/mips/translate_init.c.inc b/target/mips/translate_init.c.inc
index 044052fb77c..21ee22c05dc 100644
--- a/target/mips/translate_init.c.inc
+++ b/target/mips/translate_init.c.inc
@@ -936,19 +936,19 @@ void mips_cpu_list(void)
}
#ifndef CONFIG_USER_ONLY
-static void no_mmu_init (CPUMIPSState *env, const mips_def_t *def)
+static void no_mmu_init(CPUMIPSState *env, const mips_def_t *def)
{
env->tlb->nb_tlb = 1;
env->tlb->map_address = &no_mmu_map_address;
}
-static void fixed_mmu_init (CPUMIPSState *env, const mips_def_t *def)
+static void fixed_mmu_init(CPUMIPSState *env, const mips_def_t *def)
{
env->tlb->nb_tlb = 1;
env->tlb->map_address = &fixed_mmu_map_address;
}
-static void r4k_mmu_init (CPUMIPSState *env, const mips_def_t *def)
+static void r4k_mmu_init(CPUMIPSState *env, const mips_def_t *def)
{
env->tlb->nb_tlb = 1 + ((def->CP0_Config1 >> CP0C1_MMU) & 63);
env->tlb->map_address = &r4k_map_address;
@@ -960,25 +960,25 @@ static void r4k_mmu_init (CPUMIPSState *env, const
mips_def_t *def)
env->tlb->helper_tlbinvf = r4k_helper_tlbinvf;
}
-static void mmu_init (CPUMIPSState *env, const mips_def_t *def)
+static void mmu_init(CPUMIPSState *env, const mips_def_t *def)
{
env->tlb = g_malloc0(sizeof(CPUMIPSTLBContext));
switch (def->mmu_type) {
- case MMU_TYPE_NONE:
- no_mmu_init(env, def);
- break;
- case MMU_TYPE_R4000:
- r4k_mmu_init(env, def);
- break;
- case MMU_TYPE_FMT:
- fixed_mmu_init(env, def);
- break;
- case MMU_TYPE_R3000:
- case MMU_TYPE_R6000:
- case MMU_TYPE_R8000:
- default:
- cpu_abort(env_cpu(env), "MMU type not supported\n");
+ case MMU_TYPE_NONE:
+ no_mmu_init(env, def);
+ break;
+ case MMU_TYPE_R4000:
+ r4k_mmu_init(env, def);
+ break;
+ case MMU_TYPE_FMT:
+ fixed_mmu_init(env, def);
+ break;
+ case MMU_TYPE_R3000:
+ case MMU_TYPE_R6000:
+ case MMU_TYPE_R8000:
+ default:
+ cpu_abort(env_cpu(env), "MMU type not supported\n");
}
}
#endif /* CONFIG_USER_ONLY */
--
2.26.2
- [PULL 16/66] target/mips/mips-defs: Rename ISA_MIPS32R3 as ISA_MIPS_R3, (continued)
- [PULL 16/66] target/mips/mips-defs: Rename ISA_MIPS32R3 as ISA_MIPS_R3, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 15/66] target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 17/66] target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 18/66] target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 19/66] target/mips: Inline cpu_state_reset() in mips_cpu_reset(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 20/66] target/mips: Extract FPU helpers to 'fpu_helper.h', Philippe Mathieu-Daudé, 2021/01/07
- [PULL 21/66] target/mips: Add !CONFIG_USER_ONLY comment after #endif, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 22/66] target/mips: Remove consecutive CONFIG_USER_ONLY ifdefs, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 23/66] target/mips: Move common helpers from helper.c to cpu.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 24/66] target/mips: Rename helper.c as tlb_helper.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 25/66] target/mips: Fix code style for checkpatch.pl,
Philippe Mathieu-Daudé <=
- [PULL 26/66] target/mips: Move mmu_init() functions to tlb_helper.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 27/66] target/mips: Rename translate_init.c as cpu-defs.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 28/66] target/mips/translate: Extract DisasContext structure, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 29/66] target/mips/translate: Add declarations for generic code, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 30/66] target/mips: Replace gen_exception_err(err=0) by gen_exception_end(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 31/66] target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 32/66] target/mips: Declare generic FPU functions in 'translate.h', Philippe Mathieu-Daudé, 2021/01/07
- [PULL 33/66] target/mips: Extract FPU specific definitions to translate.h, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 34/66] target/mips: Only build TCG code when CONFIG_TCG is set, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 35/66] target/mips/translate: Extract decode_opc_legacy() from decode_opc(), Philippe Mathieu-Daudé, 2021/01/07