Re: [PATCH v2 17/21] accel/tcg: cache single instruction TB on pending replay exception

[Richard Henderson]

On 2/10/21 2:10 PM, Alex Bennée wrote:
> Again there is no reason to jump through the nocache hoops to execute
> a single instruction block. We do have to add an additional wrinkle to
> the cpu_handle_interrupt case to ensure we let through a TB where we
> have specifically disabled icount for the block.

Can you say more about this?  Because...

>      if (unlikely(qatomic_read(&cpu->exit_request))
>          || (icount_enabled()
> +            && (cpu->cflags_next_tb == -1 || cpu->cflags_next_tb & 
> CF_USE_ICOUNT)
>              && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0)) {

... this does not appear to match.  You're checking that icount has been
explicitly *enabled*?  Or am I reading the logic backward and only if icount is
enabled will we take EXCP_INTERRUPT?


r~