Re: [PATCH v1 2/5] hw/intc: sifive_clint: Use RISC-V CPU GPIO lines

[Richard Henderson]

On 7/8/21 8:30 PM, Alistair Francis wrote:
> +typedef struct sifive_clint_callback {
> +    SiFiveCLINTState *s;
> +    int num;
> +} sifive_clint_callback;

Perhaps better to put "num", perhaps with a more descriptive name (hartid?), into 
SiFiveCLINTState itself?

It would avoid some amount of double-indirection, and some awkward memory allocation in 
sifive_clint_create.


>           } else if ((addr & 0x3) == 0) {
> -            riscv_cpu_update_mip(RISCV_CPU(cpu), MIP_MSIP, 
> BOOL_TO_MASK(value));
> +            if (value) {
> +                qemu_irq_raise(clint->soft_irqs[hartid]);
> +            } else {
> +                qemu_irq_lower(clint->soft_irqs[hartid]);
> +            }

You should use qemu_irq_set here.


r~