|
| From: | Richard Henderson |
| Subject: | Re: [PATCH v2 11/22] target/loongarch: Add fixed point atomic instruction translation |
| Date: | Thu, 22 Jul 2021 15:49:13 -1000 |
| User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
On 7/20/21 11:53 PM, Song Gao wrote:
+#define TRANS_AM_W(name, op) \
+static bool trans_ ## name(DisasContext *ctx, arg_ ## name * a) \
+{ \
+ TCGv addr, val, ret; \
+ TCGv Rd = cpu_gpr[a->rd]; \
+ int mem_idx = ctx->mem_idx; \
+ \
+ if (a->rd == 0) { \
+ return true; \
+ } \
+ if ((a->rd != 0) && ((a->rj == a->rd) || (a->rk == a->rd))) { \
+ printf("%s: warning, register equal\n", __func__); \
+ return false; \
+ } \
+ \
+ addr = get_gpr(a->rj); \
+ val = get_gpr(a->rk); \
+ ret = tcg_temp_new(); \
+ \
+ tcg_gen_atomic_##op##_tl(ret, addr, val, mem_idx, MO_TESL | \
+ ctx->default_tcg_memop_mask); \
+ tcg_gen_mov_tl(Rd, ret); \
+ \
+ tcg_temp_free(ret); \
+ \
+ return true; \
+}
No printf. Use a common routine instead of macros. r~
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