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[PULL 04/14] target/arm: Add missing 'return's after calling v7m_excepti
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From: |
Peter Maydell |
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Subject: |
[PULL 04/14] target/arm: Add missing 'return's after calling v7m_exception_taken() |
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Date: |
Tue, 27 Jul 2021 11:47:51 +0100 |
In do_v7m_exception_exit(), we perform various checks as part of
performing the exception return. If one of these checks fails, the
architecture requires that we take an appropriate exception on the
existing stackframe. We implement this by calling
v7m_exception_taken() to set up to take the new exception, and then
immediately returning from do_v7m_exception_exit() without proceeding
any further with the unstack-and-exception-return process.
In a couple of checks that are new in v8.1M, we forgot the "return"
statement, with the effect that if bad code in the guest tripped over
these checks we would set up to take a UsageFault exception but then
blunder on trying to also unstack and return from the original
exception, with the probable result that the guest would crash.
Add the missing return statements.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210723162146.5167-3-peter.maydell@linaro.org
---
target/arm/m_helper.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index f9a9cb466c9..f352346a964 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -1554,6 +1554,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on
existing "
"stackframe: NSACR prevents clearing FPU registers\n");
v7m_exception_taken(cpu, excret, true, false);
+ return;
} else if (!cpacr_pass) {
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE,
exc_secure);
@@ -1561,6 +1562,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on
existing "
"stackframe: CPACR prevents clearing FPU registers\n");
v7m_exception_taken(cpu, excret, true, false);
+ return;
}
}
/* Clear s0..s15, FPSCR and VPR */
--
2.20.1
- [PULL 00/14] target-arm queue, Peter Maydell, 2021/07/27
- [PULL 01/14] hw/arm/smmuv3: Check 31st bit to see if CD is valid, Peter Maydell, 2021/07/27
- [PULL 04/14] target/arm: Add missing 'return's after calling v7m_exception_taken(),
Peter Maydell <=
- [PULL 03/14] target/arm: Enforce that M-profile SP low 2 bits are always zero, Peter Maydell, 2021/07/27
- [PULL 02/14] qemu-options.hx: Fix formatting of -machine memory-backend option, Peter Maydell, 2021/07/27
- [PULL 07/14] hw/intc/armv7m_nvic: Correct size of ICSR.VECTPENDING, Peter Maydell, 2021/07/27
- [PULL 06/14] hw/intc/armv7m_nvic: ISCR.ISRPENDING is set for non-enabled pending interrupts, Peter Maydell, 2021/07/27
- [PULL 05/14] target/arm: Report M-profile alignment faults correctly to the guest, Peter Maydell, 2021/07/27
- [PULL 11/14] target/arm: Export aarch64_sve_zcr_get_valid_len, Peter Maydell, 2021/07/27
- [PULL 09/14] docs: Update path that mentions deprecated.rst, Peter Maydell, 2021/07/27
- [PULL 10/14] target/arm: Correctly bound length in sve_zcr_get_valid_len, Peter Maydell, 2021/07/27
- [PULL 12/14] target/arm: Add sve-default-vector-length cpu property, Peter Maydell, 2021/07/27
- [PULL 13/14] hw/arm/nseries: Display hexadecimal value with '0x' prefix, Peter Maydell, 2021/07/27