Re: [PATCH v3 06/15] target/riscv: Reassign instructions to the Zbs-exte

qemu-devel

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v3 06/15] target/riscv: Reassign instructions to the Zbs-exte

From:	Richard Henderson
Subject:	Re: [PATCH v3 06/15] target/riscv: Reassign instructions to the Zbs-extension
Date:	Mon, 23 Aug 2021 10:07:20 -0700
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0

On 8/23/21 9:40 AM, Philipp Tomsich wrote:

The following instructions are part of Zbs:
  - b{set,clr,ext,inv}
  - b{set,clr,ext,inv}i

Signed-off-by: Philipp Tomsich<philipp.tomsich@vrull.eu>
---

Changes in v3:
- The changes to the Zbs instructions (i.e. the REQUIRE_ZBS macro) and
   its use for qualifying the Zba instructions) are moved into a
   separate commit.

  target/riscv/insn32.decode              | 17 +++++++++--------
  target/riscv/insn_trans/trans_rvb.c.inc | 24 +++++++++++++++---------
  2 files changed, 24 insertions(+), 17 deletions(-)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

[Prev in Thread]

Current Thread

[Next in Thread]

Re: [PATCH v3 02/15] target/riscv: Reassign instructions to the Zba-extension, (continued)
- [PATCH v3 03/15] target/riscv: slli.uw is only a valid encoding if shamt first in 64 bits, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 03/15] target/riscv: slli.uw is only a valid encoding if shamt first in 64 bits, Richard Henderson, 2021/08/23
- [PATCH v3 04/15] target/riscv: Remove the W-form instructions from Zbs, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 04/15] target/riscv: Remove the W-form instructions from Zbs, Richard Henderson, 2021/08/23
- [PATCH v3 05/15] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B), Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 05/15] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B), Richard Henderson, 2021/08/23
- [PATCH v3 01/15] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 01/15] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties, Richard Henderson, 2021/08/23
- [PATCH v3 06/15] target/riscv: Reassign instructions to the Zbs-extension, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 06/15] target/riscv: Reassign instructions to the Zbs-extension, Richard Henderson <=
- [PATCH v3 10/15] target/riscv: Add a REQUIRE_32BIT macro, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 10/15] target/riscv: Add a REQUIRE_32BIT macro, Richard Henderson, 2021/08/23
- [PATCH v3 12/15] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 12/15] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh, Richard Henderson, 2021/08/23
- [PATCH v3 07/15] target/riscv: Add instructions of the Zbc-extension, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 07/15] target/riscv: Add instructions of the Zbc-extension, Richard Henderson, 2021/08/23
- [PATCH v3 08/15] target/riscv: Reassign instructions to the Zbb-extension, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 08/15] target/riscv: Reassign instructions to the Zbb-extension, Richard Henderson, 2021/08/23
- [PATCH v3 14/15] target/riscv: rewrite slli.uw implementation to mirror formal spec, Philipp Tomsich, 2021/08/23
  - Re: [PATCH v3 14/15] target/riscv: rewrite slli.uw implementation to mirror formal spec, Richard Henderson, 2021/08/23

Prev by Date: Re: [PATCH v3 05/15] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B)
Next by Date: Re: [PATCH v3 07/15] target/riscv: Add instructions of the Zbc-extension
Previous by thread: [PATCH v3 06/15] target/riscv: Reassign instructions to the Zbs-extension
Next by thread: [PATCH v3 10/15] target/riscv: Add a REQUIRE_32BIT macro
Index(es):
- Date
- Thread