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Re: [PATCH] sun4m: fix setting CPU id when more than one CPU is present
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From: |
Artyom Tarasenko |
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Subject: |
Re: [PATCH] sun4m: fix setting CPU id when more than one CPU is present |
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Date: |
Wed, 25 Aug 2021 12:42:51 +0200 |
On Wed, Aug 25, 2021 at 12:29 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Fixes: 24f675cd3b ("sparc/sun4m: Use start-powered-off CPUState
> property")
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
> diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
> index ff8ae73002a..78ca0925d25 100644
> --- a/target/sparc/cpu.h
> +++ b/target/sparc/cpu.h
> @@ -262,6 +262,7 @@ struct sparc_def_t {
> uint32_t mmu_cxr_mask;
> uint32_t mmu_sfsr_mask;
> uint32_t mmu_trcr_mask;
> + uint8_t mxcc_cpuid;
Could it be moved a little further to avoid breaking alignment of
uint32 variables?
Regards,
Artyom
> uint32_t mxcc_version;
> uint32_t features;
> uint32_t nwindows;
> @@ -583,7 +584,6 @@ void cpu_raise_exception_ra(CPUSPARCState *, int,
> uintptr_t) QEMU_NORETURN;
>
> #ifndef NO_CPU_IO_DEFS
> /* cpu_init.c */
> -void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu);
> void sparc_cpu_list(void);
> /* mmu_helper.c */
> bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
> index 7b4dec17211..8189045fdbf 100644
> --- a/hw/sparc/leon3.c
> +++ b/hw/sparc/leon3.c
> @@ -238,8 +238,6 @@ static void leon3_generic_hw_init(MachineState *machine)
> cpu = SPARC_CPU(cpu_create(machine->cpu_type));
> env = &cpu->env;
>
> - cpu_sparc_set_id(env, 0);
> -
> /* Reset data */
> reset_info = g_malloc0(sizeof(ResetData));
> reset_info->cpu = cpu;
> diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
> index 42e139849ed..5be2e8e73f2 100644
> --- a/hw/sparc/sun4m.c
> +++ b/hw/sparc/sun4m.c
> @@ -803,10 +803,10 @@ static void cpu_devinit(const char *cpu_type,
> unsigned int id,
> cpu = SPARC_CPU(object_new(cpu_type));
> env = &cpu->env;
>
> - cpu_sparc_set_id(env, id);
> qemu_register_reset(sun4m_cpu_reset, cpu);
> object_property_set_bool(OBJECT(cpu), "start-powered-off", id != 0,
> &error_fatal);
> + object_property_set_uint(OBJECT(cpu), "cpu-id", id, &error_fatal);
> qdev_realize_and_unref(DEVICE(cpu), NULL, &error_fatal);
> *cpu_irqs = qemu_allocate_irqs(cpu_set_irq, cpu, MAX_PILS);
> env->prom_addr = prom_addr;
> diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
> index da6b30ec747..d76929c68c7 100644
> --- a/target/sparc/cpu.c
> +++ b/target/sparc/cpu.c
> @@ -194,13 +194,6 @@ static void sparc_cpu_parse_features(const char
> *typename, char *features,
> g_list_free_full(minus_features, g_free);
> }
>
> -void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu)
> -{
> -#if !defined(TARGET_SPARC64)
> - env->mxccregs[7] = ((cpu + 8) & 0xf) << 24;
> -#endif
> -}
> -
> static const sparc_def_t sparc_defs[] = {
> #ifdef TARGET_SPARC64
> {
> @@ -754,7 +747,7 @@ static void sparc_cpu_realizefn(DeviceState *dev,
> Error **errp)
> env->nwindows = env->def.nwindows;
> #if !defined(TARGET_SPARC64)
> env->mmuregs[0] |= env->def.mmu_version;
> - cpu_sparc_set_id(env, 0);
> + env->mxccregs[7] = ((env->def.mxcc_cpuid + 8) & 0xf) << 24;
> env->mxccregs[7] |= env->def.mxcc_version;
> #else
> env->mmu_version = env->def.mmu_version;
> @@ -843,6 +836,7 @@ static Property sparc_cpu_properties[] = {
> qdev_prop_uint64, target_ulong),
> DEFINE_PROP_UINT32("fpu-version", SPARCCPU, env.def.fpu_version, 0),
> DEFINE_PROP_UINT32("mmu-version", SPARCCPU, env.def.mmu_version, 0),
> + DEFINE_PROP_UINT8("cpu-id", SPARCCPU, env.def.mxcc_cpuid, 0),
> DEFINE_PROP("nwindows", SPARCCPU, env.def.nwindows,
> qdev_prop_nwindows, uint32_t),
> DEFINE_PROP_END_OF_LIST()
> ---
>