[PULL 20/28] target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macros

[Philippe Mathieu-Daudé]

gen_helper_1e1i() is one-line long and is used in one place:
simply inline it.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210816205107.2051495-6-f4bug@amsat.org>
---
 target/mips/tcg/translate.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 3417fc433ff..db7fc75d937 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -1225,10 +1225,6 @@ TCGv_i64 fpu_f64[32];
     gen_helper_##name(ret, cpu_env, tcg_constant_i32(arg1));      \
     } while (0)
 
-#define gen_helper_1e1i(name, ret, arg1, arg2) do {               \
-    gen_helper_##name(ret, cpu_env, arg1, tcg_constant_i32(arg2));\
-    } while (0)
-
 #define gen_helper_0e2i(name, arg1, arg2, arg3) do {              \
     gen_helper_##name(cpu_env, arg1, arg2, tcg_constant_i32(arg3));\
     } while (0)
@@ -1991,7 +1987,7 @@ static inline void op_ld_##insn(TCGv ret, TCGv arg1, int 
mem_idx,          \
 static inline void op_ld_##insn(TCGv ret, TCGv arg1, int mem_idx,          \
                                 DisasContext *ctx)                         \
 {                                                                          \
-    gen_helper_1e1i(insn, ret, arg1, mem_idx);                             \
+    gen_helper_##insn(ret, cpu_env, arg1, tcg_constant_i32(mem_idx));      \
 }
 #endif
 OP_LD_ATOMIC(ll, ld32s);
-- 
2.31.1