[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 24/28] target/mips: Call cpu_is_bigendian & inline GET_OFFSET in l
|
From: |
Philippe Mathieu-Daudé |
|
Subject: |
[PULL 24/28] target/mips: Call cpu_is_bigendian & inline GET_OFFSET in ld/st helpers |
|
Date: |
Wed, 25 Aug 2021 15:02:07 +0200 |
The target endianess information is stored in the BigEndian
bit of the Config0 register in CP0.
As a first step, inline the GET_OFFSET() macro, calling
cpu_is_bigendian() to get the 'direction' of the offset.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210818215517.2560994-2-f4bug@amsat.org>
---
target/mips/tcg/ldst_helper.c | 55 +++++++++++++++++++++--------------
1 file changed, 33 insertions(+), 22 deletions(-)
diff --git a/target/mips/tcg/ldst_helper.c b/target/mips/tcg/ldst_helper.c
index d42812b8a6a..8d1dfea6766 100644
--- a/target/mips/tcg/ldst_helper.c
+++ b/target/mips/tcg/ldst_helper.c
@@ -52,31 +52,36 @@ HELPER_LD_ATOMIC(lld, ldq, 0x7, (target_ulong))
#endif /* !CONFIG_USER_ONLY */
+static inline bool cpu_is_bigendian(CPUMIPSState *env)
+{
+ return extract32(env->CP0_Config0, CP0C0_BE, 1);
+}
+
#ifdef TARGET_WORDS_BIGENDIAN
#define GET_LMASK(v) ((v) & 3)
-#define GET_OFFSET(addr, offset) (addr + (offset))
#else
#define GET_LMASK(v) (((v) & 3) ^ 3)
-#define GET_OFFSET(addr, offset) (addr - (offset))
#endif
void helper_swl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
int mem_idx)
{
+ int dir = cpu_is_bigendian(env) ? 1 : -1;
+
cpu_stb_mmuidx_ra(env, arg2, (uint8_t)(arg1 >> 24), mem_idx, GETPC());
if (GET_LMASK(arg2) <= 2) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 16),
+ cpu_stb_mmuidx_ra(env, arg2 + 1 * dir, (uint8_t)(arg1 >> 16),
mem_idx, GETPC());
}
if (GET_LMASK(arg2) <= 1) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 8),
+ cpu_stb_mmuidx_ra(env, arg2 + 2 * dir, (uint8_t)(arg1 >> 8),
mem_idx, GETPC());
}
if (GET_LMASK(arg2) == 0) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 3), (uint8_t)arg1,
+ cpu_stb_mmuidx_ra(env, arg2 + 3 * dir, (uint8_t)arg1,
mem_idx, GETPC());
}
}
@@ -84,20 +89,22 @@ void helper_swl(CPUMIPSState *env, target_ulong arg1,
target_ulong arg2,
void helper_swr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
int mem_idx)
{
+ int dir = cpu_is_bigendian(env) ? 1 : -1;
+
cpu_stb_mmuidx_ra(env, arg2, (uint8_t)arg1, mem_idx, GETPC());
if (GET_LMASK(arg2) >= 1) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8),
+ cpu_stb_mmuidx_ra(env, arg2 - 1 * dir, (uint8_t)(arg1 >> 8),
mem_idx, GETPC());
}
if (GET_LMASK(arg2) >= 2) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16),
+ cpu_stb_mmuidx_ra(env, arg2 - 2 * dir, (uint8_t)(arg1 >> 16),
mem_idx, GETPC());
}
if (GET_LMASK(arg2) == 3) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24),
+ cpu_stb_mmuidx_ra(env, arg2 - 3 * dir, (uint8_t)(arg1 >> 24),
mem_idx, GETPC());
}
}
@@ -116,40 +123,42 @@ void helper_swr(CPUMIPSState *env, target_ulong arg1,
target_ulong arg2,
void helper_sdl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
int mem_idx)
{
+ int dir = cpu_is_bigendian(env) ? 1 : -1;
+
cpu_stb_mmuidx_ra(env, arg2, (uint8_t)(arg1 >> 56), mem_idx, GETPC());
if (GET_LMASK64(arg2) <= 6) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 48),
+ cpu_stb_mmuidx_ra(env, arg2 + 1 * dir, (uint8_t)(arg1 >> 48),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) <= 5) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 40),
+ cpu_stb_mmuidx_ra(env, arg2 + 2 * dir, (uint8_t)(arg1 >> 40),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) <= 4) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 3), (uint8_t)(arg1 >> 32),
+ cpu_stb_mmuidx_ra(env, arg2 + 3 * dir, (uint8_t)(arg1 >> 32),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) <= 3) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 4), (uint8_t)(arg1 >> 24),
+ cpu_stb_mmuidx_ra(env, arg2 + 4 * dir, (uint8_t)(arg1 >> 24),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) <= 2) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 5), (uint8_t)(arg1 >> 16),
+ cpu_stb_mmuidx_ra(env, arg2 + 5 * dir, (uint8_t)(arg1 >> 16),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) <= 1) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 6), (uint8_t)(arg1 >> 8),
+ cpu_stb_mmuidx_ra(env, arg2 + 6 * dir, (uint8_t)(arg1 >> 8),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) <= 0) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 7), (uint8_t)arg1,
+ cpu_stb_mmuidx_ra(env, arg2 + 7 * dir, (uint8_t)arg1,
mem_idx, GETPC());
}
}
@@ -157,40 +166,42 @@ void helper_sdl(CPUMIPSState *env, target_ulong arg1,
target_ulong arg2,
void helper_sdr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
int mem_idx)
{
+ int dir = cpu_is_bigendian(env) ? 1 : -1;
+
cpu_stb_mmuidx_ra(env, arg2, (uint8_t)arg1, mem_idx, GETPC());
if (GET_LMASK64(arg2) >= 1) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8),
+ cpu_stb_mmuidx_ra(env, arg2 - 1 * dir, (uint8_t)(arg1 >> 8),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) >= 2) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16),
+ cpu_stb_mmuidx_ra(env, arg2 - 2 * dir, (uint8_t)(arg1 >> 16),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) >= 3) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24),
+ cpu_stb_mmuidx_ra(env, arg2 - 3 * dir, (uint8_t)(arg1 >> 24),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) >= 4) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -4), (uint8_t)(arg1 >> 32),
+ cpu_stb_mmuidx_ra(env, arg2 - 4 * dir, (uint8_t)(arg1 >> 32),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) >= 5) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -5), (uint8_t)(arg1 >> 40),
+ cpu_stb_mmuidx_ra(env, arg2 - 5 * dir, (uint8_t)(arg1 >> 40),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) >= 6) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -6), (uint8_t)(arg1 >> 48),
+ cpu_stb_mmuidx_ra(env, arg2 - 6 * dir, (uint8_t)(arg1 >> 48),
mem_idx, GETPC());
}
if (GET_LMASK64(arg2) == 7) {
- cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -7), (uint8_t)(arg1 >> 56),
+ cpu_stb_mmuidx_ra(env, arg2 - 7 * dir, (uint8_t)(arg1 >> 56),
mem_idx, GETPC());
}
}
--
2.31.1
- [PULL 14/28] target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr, (continued)
- [PULL 14/28] target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 15/28] target/mips: Remove duplicated check_cp1_enabled() calls in Loongson EXT, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 16/28] target/mips: Remove gen_helper_0e3i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 17/28] target/mips: Remove gen_helper_1e2i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 18/28] target/mips: Use tcg_constant_i32() in gen_helper_0e2i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 19/28] target/mips: Simplify gen_helper() macros by using tcg_constant_i32(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 20/28] target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macros, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 21/28] target/mips: Inline gen_helper_0e0i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 22/28] target/mips: Use tcg_constant_i32() in generate_exception_err(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 23/28] target/mips: Define gen_helper() macros in translate.h, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 24/28] target/mips: Call cpu_is_bigendian & inline GET_OFFSET in ld/st helpers,
Philippe Mathieu-Daudé <=
- [PULL 25/28] target/mips: Replace GET_LMASK() macro by get_lmask(32) function, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 26/28] target/mips: Replace GET_LMASK64() macro by get_lmask(64) function, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 27/28] target/mips: Store CP0_Config0 in DisasContext, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 28/28] target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian(), Philippe Mathieu-Daudé, 2021/08/25
- Re: [PULL 00/28] MIPS patches for 2021-08-25, Peter Maydell, 2021/08/26