Re: [PULL 07/30] hw/char: Add Microchip PolarFire SoC MMUART emulation

[Alistair Francis]

On Sun, Sep 19, 2021 at 2:55 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> On Thu, Sep 10, 2020 at 8:29 PM Alistair Francis
> <alistair.francis@wdc.com> wrote:
> >
> > From: Bin Meng <bin.meng@windriver.com>
> >
> > Microchip PolarFire SoC MMUART is ns16550 compatible, with some
> > additional registers. Create a simple MMUART model built on top
> > of the existing ns16550 model.
> >
> > Signed-off-by: Bin Meng <bin.meng@windriver.com>
> > Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> > Message-Id: <1598924352-89526-6-git-send-email-bmeng.cn@gmail.com>
> > Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> > ---
> >  include/hw/char/mchp_pfsoc_mmuart.h | 61 ++++++++++++++++++++
> >  hw/char/mchp_pfsoc_mmuart.c         | 86 +++++++++++++++++++++++++++++
> >  MAINTAINERS                         |  2 +
> >  hw/char/Kconfig                     |  3 +
> >  hw/char/meson.build                 |  1 +
> >  5 files changed, 153 insertions(+)
> >  create mode 100644 include/hw/char/mchp_pfsoc_mmuart.h
> >  create mode 100644 hw/char/mchp_pfsoc_mmuart.c
> >
> > diff --git a/include/hw/char/mchp_pfsoc_mmuart.h 
> > b/include/hw/char/mchp_pfsoc_mmuart.h
> > new file mode 100644
> > index 0000000000..f61990215f
> > --- /dev/null
> > +++ b/include/hw/char/mchp_pfsoc_mmuart.h
> > @@ -0,0 +1,61 @@
> > +/*
> > + * Microchip PolarFire SoC MMUART emulation
> > + *
> > + * Copyright (c) 2020 Wind River Systems, Inc.
> > + *
> > + * Author:
> > + *   Bin Meng <bin.meng@windriver.com>
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a 
> > copy
> > + * of this software and associated documentation files (the "Software"), 
> > to deal
> > + * in the Software without restriction, including without limitation the 
> > rights
> > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or 
> > sell
> > + * copies of the Software, and to permit persons to whom the Software is
> > + * furnished to do so, subject to the following conditions:
> > + *
> > + * The above copyright notice and this permission notice shall be included 
> > in
> > + * all copies or substantial portions of the Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 
> > OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 
> > OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
> > FROM,
> > + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 
> > IN
> > + * THE SOFTWARE.
> > + */
> > +
> > +#ifndef HW_MCHP_PFSOC_MMUART_H
> > +#define HW_MCHP_PFSOC_MMUART_H
> > +
> > +#include "hw/char/serial.h"
> > +
> > +#define MCHP_PFSOC_MMUART_REG_SIZE  52
> > +
> > +typedef struct MchpPfSoCMMUartState {
> > +    MemoryRegion iomem;
> > +    hwaddr base;
> > +    qemu_irq irq;
> > +
> > +    SerialMM *serial;
> > +
> > +    uint32_t reg[MCHP_PFSOC_MMUART_REG_SIZE / sizeof(uint32_t)];
> > +} MchpPfSoCMMUartState;
> > +
> > +/**
> > + * mchp_pfsoc_mmuart_create - Create a Microchip PolarFire SoC MMUART
> > + *
> > + * This is a helper routine for board to create a MMUART device that is
> > + * compatible with Microchip PolarFire SoC.
> > + *
> > + * @sysmem: system memory region to map
> > + * @base: base address of the MMUART registers
> > + * @irq: IRQ number of the MMUART device
> > + * @chr: character device to associate to
> > + *
> > + * @return: a pointer to the device specific control structure
> > + */
> > +MchpPfSoCMMUartState *mchp_pfsoc_mmuart_create(MemoryRegion *sysmem,
> > +    hwaddr base, qemu_irq irq, Chardev *chr);
> > +
> > +#endif /* HW_MCHP_PFSOC_MMUART_H */
> > diff --git a/hw/char/mchp_pfsoc_mmuart.c b/hw/char/mchp_pfsoc_mmuart.c
> > new file mode 100644
> > index 0000000000..8a002b0a19
> > --- /dev/null
> > +++ b/hw/char/mchp_pfsoc_mmuart.c
> > @@ -0,0 +1,86 @@
> > +/*
> > + * Microchip PolarFire SoC MMUART emulation
> > + *
> > + * Copyright (c) 2020 Wind River Systems, Inc.
> > + *
> > + * Author:
> > + *   Bin Meng <bin.meng@windriver.com>
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 or
> > + * (at your option) version 3 of the License.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License along
> > + * with this program; if not, see <http://www.gnu.org/licenses/>.
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "qemu/log.h"
> > +#include "chardev/char.h"
> > +#include "exec/address-spaces.h"
> > +#include "hw/char/mchp_pfsoc_mmuart.h"
> > +
> > +static uint64_t mchp_pfsoc_mmuart_read(void *opaque, hwaddr addr, unsigned 
> > size)
> > +{
> > +    MchpPfSoCMMUartState *s = opaque;
> > +
> > +    if (addr >= MCHP_PFSOC_MMUART_REG_SIZE) {
> > +        qemu_log_mask(LOG_GUEST_ERROR, "%s: read: addr=0x%" HWADDR_PRIx 
> > "\n",
> > +                      __func__, addr);
> > +        return 0;
> > +    }
> > +
> > +    return s->reg[addr / sizeof(uint32_t)];
> > +}
> > +
> > +static void mchp_pfsoc_mmuart_write(void *opaque, hwaddr addr,
> > +                                    uint64_t value, unsigned size)
> > +{
> > +    MchpPfSoCMMUartState *s = opaque;
> > +    uint32_t val32 = (uint32_t)value;
> > +
> > +    if (addr >= MCHP_PFSOC_MMUART_REG_SIZE) {
> > +        qemu_log_mask(LOG_GUEST_ERROR, "%s: bad write: addr=0x%" 
> > HWADDR_PRIx
> > +                      " v=0x%x\n", __func__, addr, val32);
> > +        return;
> > +    }
> > +
> > +    s->reg[addr / sizeof(uint32_t)] = val32;
> > +}
> > +
> > +static const MemoryRegionOps mchp_pfsoc_mmuart_ops = {
> > +    .read = mchp_pfsoc_mmuart_read,
> > +    .write = mchp_pfsoc_mmuart_write,
> > +    .endianness = DEVICE_LITTLE_ENDIAN,
> > +    .impl = {
> > +        .min_access_size = 4,
> > +        .max_access_size = 4,
> > +    },
> > +};
> > +
> > +MchpPfSoCMMUartState *mchp_pfsoc_mmuart_create(MemoryRegion *sysmem,
> > +    hwaddr base, qemu_irq irq, Chardev *chr)
> > +{
> > +    MchpPfSoCMMUartState *s;
> > +
> > +    s = g_new0(MchpPfSoCMMUartState, 1);
>
> Please stop adding non-QOM devices, we try hard to get rid of them.

Sorry, because of serial_mm_init() I thought this would be ok

Alistair